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circt/test/Conversion/ExportVerilog
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Hideto Ueno 5ec0585bb6
[FIRRTL][SV] Add fflush operation (#8420) 
Add support for fflush operation in FIRRTL and SV dialects. This operation maps to SystemVerilog's $fflush system task, which flushes buffered output to files.

The implementation adds FFlushOp to FIRRTL dialect with clock, condition operands and optional filename with substitutions, adds FFlushOp to SystemVerilog dialect with optional file descriptor, implements lowering from FIRRTL to SystemVerilog, guards fflush with #ifndef SYNTHESIS like other simulation constructs, and adds visitor pattern support in both dialects.
 		2025-04-17 19:06:22 -07:00
..
bugs.mlir [NFC] Fix missing eof newline. 2024-08-15 15:09:33 -05:00
complex-locations.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
debug-info.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
decl-align.mlir [NFC][SV] Declare macros in most SV tests 2024-03-04 04:13:01 -08:00
disallow-local-vars.mlir [PrepareForEmission] Hoist registers in a procedural region with `disallowLocalVariables` (#7404) 2024-07-31 00:20:53 +09:00
emit-fragment-errors.mlir [Emit] Group file header ops into `emit.fragment` (#6789) 2024-03-14 09:16:04 +02:00
emit-fragment.mlir [Emit] Group file header ops into `emit.fragment` (#6789) 2024-03-14 09:16:04 +02:00
emit.mlir [FIRRTL] Remove all traces of OMIR JSON support. (#7907) 2024-11-26 16:42:55 -07:00
fixup-empty-modules.mlir [ExportVerilog] Add a lowering option to fix up empty modules (#7454) 2024-08-08 15:39:05 +09:00
header-file.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
hw-dialect.mlir [HW] Make module's doNotPrint a UnitAttr (#7777) 2024-11-06 14:25:15 -05:00
hw-enums.mlir [NFC] Output unused test results to `/dev/null` (#7859) 2024-11-21 00:42:45 +01:00
hw-lower-instance-choices.mlir [SV] Use a symbol in macro identifiers (#6777) 2024-03-04 13:12:27 +02:00
hw-typedecls-errors.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
hw-typedecls.mlir [NFC] Remove test demonstrating illegal IR. 2024-02-08 12:59:02 -08:00
instance-choice.mlir [HW] Encode the option group name in instance choice ops (#6645) 2024-02-14 13:08:57 +02:00
line-length.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
load-dialect.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
location-style.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
max-terms.mlir [NFC][SV] Declare macros in most SV tests 2024-03-04 04:13:01 -08:00
misc-lowering-opts.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
mitigate-vivado-array-index-const-prop-bug.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
name-legalize.mlir [NFC][SV] Declare macros in most SV tests 2024-03-04 04:13:01 -08:00
no-wrap.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
output-file.mlir [HW] Remove the file list attribute from HW (#6757) 2024-02-28 06:48:12 +02:00
port-decl-sharing.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
prepare-for-emission.mlir [ExportVerilog] Fix broken test: prepare-for-emission 2024-08-09 12:50:19 +00:00
pretty.mlir [SV] Add MacroRefOp to represet macro statement (#7607) 2024-09-25 17:29:57 +09:00
pruning.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
split-output-file.mlir [ExportVerilog] Back-annotate output file attributes during export. (#8338) 2025-03-21 18:19:05 -06:00
sv-always-wire.mlir [PrepareForEmission][Prettify] Extend allowExprInClock to handle verif ops (#7332) 2024-07-23 04:23:20 +09:00
sv-alwayscomb.mlir Don't read lowering options from hidden global options (#4038) 2022-10-04 15:41:03 -05:00
sv-dialect.mlir [FIRRTL][SV] Add fflush operation (#8420) 2025-04-17 19:06:22 -07:00
sv-fwrite.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
sv-interfaces.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
sv-verifLabels.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
variadic-operand-splitting.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
verif.mlir [ExportVerilog] Treat verif.contract as no-op (#8143) 2025-01-29 15:22:16 -08:00
verilog-basic.mlir [sv] Add $time, $stime system functions 2025-03-21 00:27:58 -04:00
verilog-errors.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
verilog-locations.mlir [ExportVerilog] Drop external module emission (#7558) 2024-08-28 10:56:55 -04:00
version-comment.mlir [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00