mirror of https://github.com/llvm/circt.git
48 lines
2.0 KiB
MLIR
48 lines
2.0 KiB
MLIR
// RUN: circt-opt %s -export-verilog | FileCheck %s
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module attributes {circt.loweringOptions = "locationInfoStyle=wrapInAtSquareBracket"} {
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// CHECK-LABEL: module Callstack(
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// CHECK-SAME: // @[{'foo'(fooSource.x:10:8) <- {'bar'(barSource.x:20:8) <- 'baz'(bazSource.x:30:8)}}]
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// Emulate a callstack-like location info.
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hw.module @Callstack(in %a: i1 loc("")) {
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hw.output
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} loc(callsite(
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"foo"("fooSource.x":10:8)
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at callsite("bar"("barSource.x":20:8)
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at "baz"("bazSource.x":30:8))))
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// Check location merging logic.
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// CHECK-LABEL: module MergedLocations(
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hw.module @MergedLocations(in %clock: i1, in %flag1 : i1, in %flag2: i1, in %flag3: i1) {
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%true = hw.constant 1 : i1 loc("")
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%false = hw.constant 0 : i1
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%r1 = sv.reg : !hw.inout<i1>
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%r2 = sv.reg : !hw.inout<i1>
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sv.always posedge %clock {
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// Induce FileLineColLoc merging.
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// CHECK: r1 <= flag1 + flag2 + 1'h1 + flag3; // @[myFile.x:9:3, :10:6, myOtherFile.x:9:4, :10:5]
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%0 = comb.add %flag1, %flag2 : i1 loc("myFile.x":10:6)
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%1 = comb.add %true, %flag3 : i1 loc("myOtherFile.x":10:5)
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%mergedFLCLoc = comb.add %0, %1 : i1 loc("myOtherFile.x":9:4)
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sv.passign %r1, %mergedFLCLoc : i1 loc("myFile.x":9:3)
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// Now add in a callstack and named location.
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// Note: We duplicate the operations here to avoid wire spilling.
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// CHECK: r2 <= flag1 + flag2 + 1'h1 + flag3 - 1'h1; // @['MyNamedLocation'(), {'foo'(myFile.x:10:8) <- {'bar'(myFile.x:20:8) <- 'baz'(myFile.x:30:8)}}, myFile.x:9:4, :10:{5,6}]
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%callstack_0 = comb.add %flag1, %flag2 : i1 loc("myFile.x":10:6)
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%callstack_1 = comb.add %true, %flag3 : i1 loc("myFile.x":10:5)
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%callstack_mergedFLCLoc = comb.add %callstack_0, %callstack_1 : i1 loc("myFile.x":9:4)
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%callstackLoc = comb.add %callstack_mergedFLCLoc, %true : i1 loc(callsite(
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"foo"("myFile.x":10:8)
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at callsite("bar"("myFile.x":20:8)
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at "baz"("myFile.x":30:8))))
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sv.passign %r2, %callstackLoc : i1 loc("MyNamedLocation")
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}
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}
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}
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