hustos
/
fpga-pynq
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
219 Commits 8 Branches 0 Tags 42 MiB
Commit Graph

219 Commits

Author SHA1 Message Date
David Biancolin 816d941ca0
Merge pull request #82 from ucb-bar/new-devices-no-nic 
Merge new-devices (without NIC)
 2018-04-20 15:35:21 -04:00
David Biancolin 040a8ad2ac
Update readme to include deprecation note. 2018-04-20 15:25:12 -04:00
Howard Mao 94893f1d62 add instructions for using block device to README 2018-04-18 17:51:13 -07:00
Howard Mao 1e9c73ffc6 update generated bitstreams 2018-04-18 17:51:13 -07:00
Howard Mao 4ad153c407 shrink the medium config 2018-04-18 17:51:12 -07:00
Howard Mao 4556425d58 upgrade to latest RocketChip 
* Scala updates to 2.11.12
* Bootrom code moved to testchipip
* Makefrag for testchipip blackboxes moved to testchipip
* Added support for block device
 2018-04-18 17:49:15 -07:00
David Biancolin f03982e6a1 Remove defunct recipes from README 2017-04-02 12:23:24 -07:00
David Biancolin 35105b5ba0 Use HTTPS exclusively. Fixes #45 2017-03-25 22:04:00 -07:00
David Biancolin 4400930abf Linux boot documentation fix (#44) 
* Update README to reflect changes in BBL, remove unneeded make recipes
 2017-03-17 14:16:17 -07:00
David Biancolin 29aaeefe3f Merge pull request #41 from ucb-bar/firrtl-dep-fix 
Manage firrtl dependency manually
 2017-03-10 09:10:42 -08:00
David Biancolin feb370de1c Manage firrtl dependency manually 2017-03-09 17:47:58 -08:00
David Biancolin 46838fd2f0 Fixes #39 Make NastiFIFO chisel3 conformant 2017-02-27 10:08:22 -08:00
Howard Mao 4994d21937 fix deprecation warnings 2017-02-08 13:38:29 -08:00
David Biancolin 2aea76181a Merge pull request #38 from ucb-bar/chisel3-switch 
Switch to chisel3
 2017-02-08 10:09:01 -08:00
Howard Mao 4a1d0d98ed switch to chisel3 2017-02-07 18:06:05 -08:00
David Biancolin 8d5981cdab Update README to uniformly suggest vivado 2016.2 2017-01-10 16:19:12 -08:00
Howard Mao ac39be1c1f get README.md up to date 2016-11-01 13:35:25 -07:00
Howard Mao eb96e9db7f replace init-rocket-submodule with init-submodules rule in Makefrag 2016-11-01 13:34:54 -07:00
Howard Mao 9a0b82d0c4 update FPGA images 2016-10-28 13:52:38 -07:00
Howard Mao 3ed82263c4 use TestDriver.v in rocket-chip not in testchipip 2016-10-24 17:19:32 -07:00
Howard Mao 03e919a86a NoDebug trait moved to testchipip 2016-10-24 17:19:24 -07:00
Howard Mao 947e3bae46 move TestDriver.v into testchipip 2016-10-24 17:19:15 -07:00
Howard Mao 33b1e90efc make sure to use the correct kind of include for Makefrag.pkgs 2016-10-24 17:19:08 -07:00
Howard Mao 1ef84b9171 make sure simulation directory has src/verilog folder 2016-10-17 16:26:21 -07:00
Howard Mao 31f0bd2422 make sure library stamps have correct dependencies 2016-10-11 11:42:46 -07:00
Howard Mao f6978c40e0 make submodule building more extensible 2016-10-10 16:42:09 -07:00
Howard Mao 42959c7514 get rid of generated verilog files 2016-10-07 16:57:01 -07:00
Howard Mao e2cf7799cc bump rocket-chip submodule pointer to get riscv-fesvr change 2016-10-07 16:50:19 -07:00
Howard Mao 07c02e7a0f SAI renamed to TSI 2016-10-07 15:20:38 -07:00
Howard Mao d1f80398fb move simulation serial into testchipip 2016-10-07 14:59:10 -07:00
Howard Mao 685731faf1 make sure Zybo configuration has virtual memory 2016-10-07 14:16:20 -07:00
Howard Mao 640e64cb5a add ability to reset target through AXI 2016-10-06 21:20:46 -07:00
Howard Mao 73f1a41a68 fix issues with NastiFIFO 2016-10-06 17:45:50 -07:00
Howard Mao 3d4a544d8d make integration test use single-beat bursts 2016-10-06 14:46:08 -07:00
Howard Mao 4d707d3ab0 fix integration test and make it test NastiFIFO 2016-10-05 11:12:24 -07:00
Howard Mao 2f665ca9cf fix up NastiFIFO to take multi-beat reads 2016-10-05 11:12:03 -07:00
Howard Mao 79697316de replace dtm driver with sai driver 2016-10-05 09:26:49 -07:00
Howard Mao 0e8e494570 fixups to serial adapter 2016-10-04 18:34:41 -07:00
Howard Mao cfc9f33973 get rid of top-level riscv-fesvr submodule; use one in riscv-tools 2016-10-04 17:59:33 -07:00
Howard Mao 11a6c0e7e2 update to latest rocketchip master 2016-10-04 16:51:47 -07:00
Howard Mao 5cddc881ad move SerialAdapter code to testchipip 2016-10-04 14:52:49 -07:00
Howard Mao 75b4ea3775 add our own version of the bootrom 2016-10-04 13:23:50 -07:00
Howard Mao 85a98e6f05 actually implement SimSerial 2016-10-04 13:19:11 -07:00
Howard Mao b91b06e8de get rid of reset in Adapter 2016-10-04 13:18:47 -07:00
Howard Mao d392485525 allow host to read how much data/space is available in FIFOs 2016-10-03 17:03:38 -07:00
Howard Mao 8a18edde38 get rid of interrupts and slave device in adapter 2016-10-03 17:02:45 -07:00
Howard Mao 3f3e755d6a fix up makefiles 2016-10-03 16:59:41 -07:00
Howard Mao bbc47cae6e add riscv-fesvr submodule 2016-10-03 09:20:01 -07:00
Howard Mao f3f3a44386 rename ZynqAdapter to SerialAdapter 2016-09-29 13:10:53 -07:00
Howard Mao bf036fb956 start implementing alternate adapter interface 2016-09-29 12:44:47 -07:00