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6482 Commits

Author SHA1 Message Date
Wesley W. Terpstra 70e0f257f0 LanePositionedQueue: support non-power-of-2 in SRAM 2018-11-19 23:51:43 -08:00
Wesley W. Terpstra b37953a768 LanePositionedQueue: support non-power-of-2 sizings 2018-11-19 23:51:43 -08:00
Wesley W. Terpstra 1fa19c23d6 LanePositionedQueue: add a flop-based variant 2018-11-19 23:51:43 -08:00
Wesley W. Terpstra d31cbb8416 LanePositionedQueue: first cut at an implementation 2018-11-19 23:51:43 -08:00
Wesley W. Terpstra 4bbfce4978 PositionalMultiQueue: obsolete 2018-11-19 23:51:43 -08:00
Wesley W. Terpstra 14f38d469e ScatterGather: helper methods for sparse => dense conversion 2018-11-19 23:51:43 -08:00
Wesley W. Terpstra 5d768aa01a PrefixSum: a handy API for various PrefixSum algorithms 2018-11-19 23:51:43 -08:00
Richard Xia 9205bd8cec
Merge pull request #1711 from freechipsproject/om-types 
Add hardcoded Object Model types
 2018-11-19 22:54:15 -08:00
Richard Xia b6c8c705e4 Add hardcoded types to OM classes. 2018-11-19 12:55:23 -08:00
Richard Xia bb3e2b7c21 Add custom serializer for OMEnum. 2018-11-19 11:52:49 -08:00
Derek Pappas b3fbb12ea7 Om scala debug (#1710) 
Capture debug module properties
 2018-11-18 17:31:55 -08:00
Derek Pappas e627d93fa6
Nomi4 (#1703) 
Adding more object model classes. 
Changed getOMComponents()
Added a helper function for getOMComponents()
Added OMPLIC and OMCLINT
 2018-11-15 13:51:54 -08:00
Sam Huffman 7c415eaa26
Merge pull request #1601 from freechipsproject/remove-riscv-tools 
Remove riscv tools
 2018-11-15 08:26:41 -08:00
Sam Huffman ee21bb2902 Change riscv-tools install rule so checkout is an order-requ rather than dependency. This is to 
ensure that a cached install, if present, is used.
 2018-11-14 16:07:49 -08:00
Wesley W. Terpstra d7cbd1c677 Remove riscv-tools submodule and store the desired hash in riscv-tools.hash. Update the 
makefile rules to checkout and build using this hash.
 2018-11-14 16:06:33 -08:00
Wesley W. Terpstra ce4fcf333b
Generator: support using _root_ for the project (#1704) 
This allows us to take Configs from multiple packages at once
 2018-11-13 19:04:01 -10:00
Henry Cook eb1063467f
tilelink: remove NodeNumberer and Splitter (#1701) 2018-11-10 23:23:08 -08:00
Henry Cook 840d2a2226
devices: maskrom has helper object attach instead of trait (#1698) 
* devices: maskrom has helper object attach instead of trait

* maskrom: remove unused param key
 2018-11-09 15:25:26 -08:00
Andrew Waterman 9ac2d897c9
Respect PTW access-exception signal (#1700) 2018-11-09 12:28:20 -08:00
Wesley W. Terpstra 05ccbffaa9
Merge pull request #1697 from freechipsproject/multi-chip-coherence 
Multi chip coherence
 2018-11-08 14:11:48 -10:00
Wesley W. Terpstra 24838ee772 AddressAdjuster: use a BundleBridge for chip_id 2018-11-08 12:50:18 -08:00
Wesley W. Terpstra 0cd6c99bf3 BundleBroadcast: fan-out a BundleBridgeSource to multiple BundleBridgeSinks 2018-11-08 12:50:14 -08:00
Wesley W. Terpstra 1a7b84cc7c Parameters: prevent a stack overflow in AddressSet.subtract 2018-11-06 20:30:24 -08:00
Wesley W. Terpstra 0f116b65d5 AddressAdjust: fix a constraint bug 2018-11-06 20:30:24 -08:00
Wesley W. Terpstra 8260cd8b78 subsystem: make it possible to redirect bus addressing 2018-11-06 20:30:24 -08:00
Henry Cook 27634c912e
subsystem: keep pbus frontside wide if atomics widened it (#1692) 2018-11-06 17:17:17 -08:00
Wesley W. Terpstra 5c34935ac8
AXI4Fragmenter: support tiny AXI4 address space (#1695) 
When the entire AXI4 address space is small (for example, a 4kB test
device), it is possible for a single AXI burst to be larger than the
available address bits on the bus. Handle this case gracefully.

Fixes #1683
 2018-11-06 09:04:09 -10:00
Wesley W. Terpstra bb271f7474 Rename OM components (#1696) 
* adding getOMComponents
 2018-11-06 10:55:45 -08:00
Wesley W. Terpstra ef63230bdf
TLBroadcast: fix bug where multiple trackers could match a response (#1690) 
This could be triggered whenever an A=>D source gets reused before
the outstanding GrantAck comes back.
 2018-11-05 18:24:49 -10:00
Henry Cook 0a3e7c9a12
Merge pull request #1669 from grebe/noZynq 
Update README reference to fpga-zynq.
 2018-11-05 13:03:49 -08:00
Derek Pappas df2a964bd3
Object model (#1684) 
* Added Object Model case classes

* Added objectionModelInstance function to SimpleDevice

* Added object model JSON elaboration artifact.

* Added companion object and OMISA factory
 2018-11-05 12:49:51 -08:00
Andrew Waterman 5627b138ae
Add another condition to rocket clock enable (#1686) 2018-11-02 15:09:48 -07:00
Boran Car 4c02fcf2d9 Note for compiling custom programs (#1653) 
This saves time and links to the blog for newcomers who keep banging
their head against the wall when they can't compile custom example
programs.
 2018-11-01 16:09:09 -07:00
Henry Cook 1ff6f2bebb
subsystem: offer view from all bus wrappers (#1685) 2018-11-01 12:24:49 -07:00
Henry Cook 8aa4a19a17
Merge pull request #1682 from freechipsproject/periphery-bus-atomics 
subsystem: allow PeripheryBuses to support wider atomics
 2018-10-31 15:05:23 -07:00
Henry Cook f1879b75d4 subsystem: optional devnulls in every bus wrapper 2018-10-31 13:01:28 -07:00
Henry Cook 2620ba89b1 subsystem: allow periphery bus to support wider atomics 2018-10-31 10:55:56 -07:00
Andrew Waterman 4f9f3f4f99
Merge pull request #1680 from freechipsproject/clock-gate-disable 
Make clock_en_reg disappear when clockGate = false
 2018-10-30 14:49:57 -07:00
Alex Solomatnikov 8f012cc6a2
Allow subsytem w/ multiple cores and w/o PLIC (or external PLIC) (#1681) 2018-10-30 10:02:06 -07:00
Andrew Waterman 6e23d71031 Make RandomReplacement support non-power-of-2 values 2018-10-29 18:19:32 -07:00
Andrew Waterman f0e40a21d8 Make clock_en_reg disappear when clockGate = false 2018-10-29 15:25:13 -07:00
Henry Cook 5439edc4c4
Merge pull request #1679 from freechipsproject/subsystem-bus-connectivity 
Handle subsystem bus interconnectivity in child classes of BaseSubsystem pt 2
 2018-10-29 13:22:00 -07:00
Henry Cook 183e937a62
Merge pull request #1675 from freechipsproject/subsystem-bus-connectivity-2 
Handle subsystem bus interconnectivity in child classes of BaseSubsystem
 2018-10-29 09:54:17 -07:00
Henry Cook 89ff3dc548 subsystem: move inter-bus coupling to child classes of BaseSubsystem 2018-10-28 20:30:23 -07:00
Henry Cook f65bf8215b subsystem: consolidate Fields and prune imports 2018-10-28 20:30:23 -07:00
Henry Cook 4a865f16b2 subsystem: streamline inter-bus couplers 2018-10-28 20:30:23 -07:00
Henry Cook 5d24a3e4f8 groundtest: prune traits 2018-10-28 20:30:23 -07:00
Alex Solomatnikov db3ee74e90
Fix up(...).copy(...) use (#1677) 2018-10-26 19:29:58 -07:00
Alex Solomatnikov 3afb34aefa
Optimize away Fragmenter when minSize == maxSize (#1676) 2018-10-26 19:29:38 -07:00
Henry Cook 35ea8e1a02
Merge pull request #1674 from freechipsproject/subsystem-bus-connectivity 
Move sbus.control_bus to subsystem level
 2018-10-26 18:33:57 -07:00