2bd70937cb
support verilator | rename build variable
2019-04-22 23:26:13 -07:00
0e5e1bac15
fix test harness builds
2019-04-22 22:36:04 -07:00
f11901a393
added configmixin file
2019-04-22 16:41:11 -07:00
0278845009
separated mixins from configs
2019-04-22 16:28:37 -07:00
47149a0649
change smallboom to boomconfig
2019-04-22 14:47:53 -07:00
180a2ab4a8
harness builds with gpio tied off
2019-04-21 16:07:30 -07:00
668047e3fd
added GPIO config | breaks on building test harness
2019-04-21 15:19:15 -07:00
eda0b113c1
more default subprojects | fix example builds
2019-04-21 14:41:02 -07:00
b8eadb99eb
add back example to rocket system
2019-04-20 21:20:20 -07:00
c0b0e293c5
removed boom package and combined into example | removed example from naming | split generator file
2019-04-20 21:18:20 -07:00
e9ed53424b
add sifive blocks | add rebar configs for boom
2019-04-19 21:06:32 -07:00
b65c2a6704
Merge pull request #55 from ucb-bar/boom-add
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[rebar] add BOOM, riscv-torture, and modify scripts
2019-04-19 16:06:23 -07:00
daed74b873
lowercase readme
2019-04-18 20:10:20 -07:00
eec137e1ee
make tapeout depend on testchipip for resources
2019-04-18 14:38:57 -07:00
6bff4c79c8
Merge pull request #68 from ucb-bar/rebar-dev-clean
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[rebar] fix make clean
2019-04-18 14:29:40 -07:00
e4aa81b2f8
fix make clean
2019-04-18 14:25:37 -07:00
7faaa56f34
revert condDependsOn | put new firrtl jar into rocket
2019-04-18 11:39:19 -07:00
739fcec160
remove csmith scripts
2019-04-17 23:16:04 -07:00
46f2cd3f9d
remove debug firrtl prints
2019-04-17 23:14:07 -07:00
e8d263c632
Merge remote-tracking branch 'origin/rebar-dev' into boom-add
2019-04-17 23:11:38 -07:00
adb8897e35
add firrtl dependency to build.sbt | point to different firrtl jar | a bunch of sbt plugins
2019-04-17 23:11:14 -07:00
5b8eb27c80
Merge pull request #67 from ucb-bar/rebar-dev-align
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align rebar with tip of project-template master | fixes build issues
2019-04-17 23:10:12 -07:00
e71bf2139f
Update README | add shortcut to build boom
2019-04-17 17:52:31 -07:00
885c5f74db
bump boom/firrtl | support building boom | update genfiles in simulator to make rv32 bootrom | misc cleanup
2019-04-17 17:08:08 -07:00
80cbdd1d31
Merge remote-tracking branch 'origin/rebar-dev-align' into boom-add
2019-04-17 16:07:02 -07:00
68b2da6b3a
update boom | match build.sbt
2019-04-17 16:06:42 -07:00
7d887b212c
align rebar with tip of project-template master | fixes build issues
2019-04-17 16:02:44 -07:00
00d8e04d93
Use SBT for barstools instead of jars ( #66 )
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* Use SBT for barstools instead of jars
* Make MACROCOMPILER_MODE a variable
This eases the downstream maintenance burden where `MACROCOMPILER_MODE` is not simply `--mode synflops`
2019-04-16 21:15:00 -07:00
30ef609fb8
allow sbt runMain from sbt subproject
2019-04-15 10:17:42 -07:00
f45369365b
rename build.sh and move to scripts
2019-04-15 10:17:42 -07:00
d80acd8cf8
added boom and torture | added csmith
2019-04-15 10:17:42 -07:00
8b899c519d
rename makefiles | move verilog rule to common.mk
2019-04-15 10:17:41 -07:00
eb44ae13d4
makefile changes/split | add scripts
2019-04-15 10:17:41 -07:00
31e30b2ec7
change dir structure
2019-04-15 10:17:41 -07:00
5be8de1288
Build additional annos and fir ( #64 )
2019-03-29 14:00:52 -07:00
3425def36b
Bumps barstools and fixes build system after ( #63 )
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Barstools now handles annotations correctly.
This means that the blackboxresources for the harness
and top are different and need to be merged in the build system.
We also add all Sim*.cc files to default resources as our new emulator
demands. We then remove them from the harness .f file to avoid having
to detect which ones to include selectively.
2019-03-28 11:47:32 -07:00
cf9136de4a
backport ucb-bar/project-template/pull/59
2019-03-28 09:36:16 -07:00
419d41239f
Merge pull request #59 from ucb-bar/rebar-srams-fix
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Bump barstools and re-add infer-rw for better SRAM mapping
2019-03-18 09:30:01 -07:00
ffee1f1e98
Bump barstools and re-add infer-rw for better SRAM mapping
2019-03-18 07:31:27 -07:00
319d2fedf7
more docs
2019-03-16 00:15:02 -07:00
87f9c14dcc
Merge pull request #54 from ucb-bar/misc-changes
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Makefile + Ctags
2019-03-15 18:47:00 -07:00
e33f2fcedf
find now follows symlinks
2019-03-12 15:39:19 -07:00
c364869563
default to .gitignoring all files in verisim/vsim | read verilator.mk
2019-03-12 14:39:15 -07:00
4fd1bfbd56
delete .ctags (have the user put this in their home)
2019-03-12 14:39:15 -07:00
2c246af110
rename makefiles | move verilog rule to common.mk
2019-03-12 14:39:15 -07:00
82273107c1
makefile changes/split | add scripts
2019-03-12 14:39:15 -07:00
49ab106b9e
docs placeholder
2019-03-12 14:30:38 -07:00
6ccb3defc1
add toolchains
2019-03-12 14:30:38 -07:00
4d62a2b215
docs placeholder
2019-03-12 14:30:38 -07:00
2e7791a57d
add chisel and firrtl submodules
2019-03-12 14:30:38 -07:00
abejgonzalez