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# RISC-V Project Template
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**THIS BRANCH IS UNDER DEVELOPMENT**
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**IT CURRENTLY HAS MANY SUBMODULES**
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**PLEASE RUN ./scripts/init-submodules-no-riscv-tools.sh TO UPDATE SUBMODULES, UNLESS YOU WANT TO SPEND A LONG TIME WAITING FOR SUBMODULE TO CLONE**
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**This branch is under development**
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**It currently has many submodules**
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**Please run ./scripts/init-submodules-no-riscv-tools.sh to update submodules, unless you want to spend a long time waiting for submodule to clone**
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This is a starter template for your custom RISC-V project. It will allow you
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to leverage the Chisel HDL and RocketChip SoC generator to produce a
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