10f9e7efe0
Support SBT thin client in FireSim standalone | Split JAVA/SBT options
2020-12-02 16:10:17 -08:00
bf05870d22
Bump Chipyard
2020-12-02 14:51:21 -08:00
5ccad8ab9b
add --no-dce to GoldenGate invocation until DCE is fixed
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without --no-dce, currently will hit
[error] (run-main-0) java.lang.AssertionError: assertion failed: ~F1Shim|FireSim/lazyModule:ChipTop/system:DigitalTop/subsystem_l2_wrapper:CoherenceManagerWrapper/l2:InclusiveCache/mods_0:Scheduler/abc_mshrs_0:MSHR>_T_79 should be renamed exactly once. Suggested renames: List()
With the default FireSimRocketConfig
2020-12-01 21:44:10 +00:00
ff837e5a0d
rm PlusArgReaderRemoval from BaseF1Config. Add `define SYNTHESIS
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The PlusArgReaderPass changes extmodule plusarg_reader to
a module that drives its output from DEFAULT but does not remove
BlackBox* Annotations. It relies on DeadCodeElimination coming along
later to clean up the
Rather than using the PlusArgReaderPass, the verilog SYNTHESIS `define
accomplishes the same effect in the plusarg_reader blackbox verilog.
2020-12-01 21:32:01 +00:00
4752009e98
Point chisel project to proper location
2020-11-30 21:22:08 -08:00
5e64d78300
Bump library dependencies
2020-11-28 16:01:12 -08:00
f89d746aa3
chisel 3.4 updates
2020-11-11 18:37:26 +00:00
37fe89a65f
Bump Chipyard
2020-11-05 10:31:39 -08:00
a7321df422
Bump Chipyard
2020-11-04 18:40:59 -08:00
57efb2ec03
Rename Ariane to CVA6
2020-11-04 15:38:59 -08:00
aab053bce2
Merge pull request #648 from firesim/loadmem-fix
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Fix RAW bug in firesim_tsi loadmem_read
2020-10-27 13:40:20 -07:00
ebd3688299
Merge branch 'dev' into loadmem-fix
2020-10-19 09:05:35 -07:00
1c76c446da
Merge pull request #644 from firesim/diplomatic-clocks-mbus-crossing
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Place FASED in a Seperate Clock Domain By Default
2020-10-19 11:28:34 -04:00
11dbebdef0
Regenerate AGFIs
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[ci skip]
2020-10-19 15:27:52 +00:00
a8a0054d92
Fix RAW bug in firesim_tsi loadmem_read
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Wait for the write queue to empty before reading in loadmem.
2020-10-18 17:08:48 -07:00
f1e3ddc101
Bump CY
2020-10-16 23:23:54 +00:00
44649158c0
Merge remote-tracking branch 'origin/dev'. Needs CY bump.
2020-10-16 23:19:48 +00:00
01a0d01c9a
Clean up FAME1Transform based on Albert's suggestions
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Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
2020-10-16 19:16:10 -04:00
830439a659
Merge pull request #647 from firesim/extract-all-threaded-instances
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Label all threading targets as FAME models when threading is enabled
2020-10-16 13:46:31 -07:00
0f31d8100e
Remove redundant FAMEModelAnnotations from threaded unit tests
2020-10-16 18:40:38 +00:00
3b5da115c0
Label all threading targets as FAME models when threading is enabled
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* Fix suggestion from review
2020-10-16 18:40:38 +00:00
f0257a3f73
Merge pull request #645 from firesim/shared-configs
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Have FireSim build recipes use Chipyard configs rather than FireChip configs
2020-10-16 11:17:45 -07:00
8f0fc026da
fix unittest makefrag
2020-10-16 17:12:44 +00:00
c909c4cb8c
Merge remote-tracking branch 'origin/dev' into shared-configs
2020-10-16 16:03:30 +00:00
48207e5dc9
bump chipyard for default package parsing
2020-10-16 16:01:51 +00:00
73d24b1b49
nit parens removal
2020-10-16 15:57:20 +00:00
6263d16832
Better names for CD enables and more documentation for FAME1 transform
2020-10-16 15:33:10 +00:00
2112b62084
[FAME1] Cleaner implementation of time 0 logic prop
2020-10-16 15:14:02 +00:00
def3c434e6
[midasexamples] Update trivial multiclock for slightly different time0 behavior
2020-10-16 15:11:38 +00:00
0e4787a04a
remove WithDefaultMemModel arg
2020-10-15 21:41:18 +00:00
b9a9061b0b
type
2020-10-15 17:52:56 +00:00
b35e81422c
updated build recipes to use chipyard configs
2020-10-15 17:02:44 +00:00
063e446271
update makefiles with new default target config package delimiter
2020-10-15 17:02:17 +00:00
89a2ac931e
Regenerate AGFIs. NB: FMR regression (1.7 -> 3.5) over last regeneration
2020-10-15 15:58:30 +00:00
4e746d9d38
Bump CY
2020-10-15 15:57:11 +00:00
a8900919cb
Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing
2020-10-14 14:50:01 -07:00
64b55aff39
[passes] Modify FAME Xform to enable comb prop after an edge
2020-10-14 14:04:48 -07:00
fa8650c4cd
Merge pull request #641 from firesim/unify-fesvr
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Unify fesvr with chipyard
2020-10-12 10:51:30 -07:00
f042464440
Bump Chipyard
2020-10-09 09:34:59 -07:00
6318184f30
Rename firesim_fesvr to firesim_tsi
2020-10-09 09:30:40 -07:00
288aad3aa8
Unify fesvr with chipyard
2020-10-09 09:25:13 -07:00
0ad13d1093
Merge pull request #638 from firesim/support-no-mem
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Add support for target designs with SerialBridge but no DRAM
2020-10-08 11:50:57 -07:00
2328c7e28d
Bump Chipyard
2020-10-01 22:38:05 -07:00
ef615d35da
Merge remote-tracking branch 'origin/dev' into support-no-mem
2020-10-01 09:45:22 -07:00
f418a0095a
Merge pull request #632 from firesim/chipyard-pll
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Support for Mirroring Chipyard's Idealized PLL
2020-09-30 22:25:08 -07:00
801baeb901
Merge remote-tracking branch 'origin/dev' into chipyard-pll
2020-09-30 14:42:22 -07:00
cada120c01
Merge pull request #637 from firesim/threaded-sync-mem-unit-test
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Add a multi-threading unit test to midasexaples for threaded sync-read mems
2020-09-30 14:39:26 -07:00
41c8ce9ac7
Add SerialBridgeParams scaladoc
2020-09-30 20:48:09 +00:00
7240be6fef
Add unit test to midasexaples for threaded models with sync-read mems
2020-09-30 20:03:15 +00:00
014b85f4b8
Merge pull request #636 from firesim/mt-config-opt
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Add platform config options to selectively enable model multithreading
2020-09-30 13:00:26 -07:00
abejgonzalez