mirror of https://github.com/llvm/circt.git
15 lines
1.2 KiB
MLIR
15 lines
1.2 KiB
MLIR
// RUN: circt-opt %s --arc-infer-memories="tap-memories=0" | FileCheck %s --check-prefixes=CHECK,CHECK-TAP-OFF
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// RUN: circt-opt %s --arc-infer-memories="tap-memories=1" | FileCheck %s --check-prefixes=CHECK,CHECK-TAP-ON
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// CHECK-LABEL: hw.module @TestMemory(
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hw.module @TestMemory(in %clock: !seq.clock, in %addr: i10, in %enable: i1, in %data: i8) {
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// CHECK: arc.memory <1024 x i8, i10>
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// CHECK-TAP-OFF-NOT: name = "foo"
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// CHECK-TAP-ON: name = "foo"
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hw.instance "foo" @Memory(W0_addr: %addr: i10, W0_en: %enable: i1, W0_clk: %clock: !seq.clock, W0_data: %data: i8) -> ()
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}
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hw.generator.schema @FIRRTLMem, "FIRRTL_Memory", ["depth", "numReadPorts", "numWritePorts", "numReadWritePorts", "readLatency", "writeLatency", "width", "maskGran", "readUnderWrite", "writeUnderWrite", "writeClockIDs"]
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hw.module.generated @Memory, @FIRRTLMem(in %W0_addr: i10, in %W0_en: i1, in %W0_clk: !seq.clock, in %W0_data: i8) attributes {depth = 1024 : i64, maskGran = 8 : ui32, numReadPorts = 0 : ui32, numReadWritePorts = 0 : ui32, numWritePorts = 1 : ui32, readLatency = 1 : ui32, readUnderWrite = 0 : ui32, width = 8 : ui32, writeClockIDs = [], writeLatency = 1 : ui32, writeUnderWrite = 1 : i32}
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