Commit Graph

248777 Commits

Author SHA1 Message Date
Craig Topper 9d16bfa0f5 [AVX-512] Add many of the VPERM instructions to the load folding table. Move VPERMPDZri to the correct table.
llvm-svn: 288591
2016-12-03 19:37:39 +00:00
Matt Arsenault b55f620ebc AMDGPU: Clean up struct initializers
llvm-svn: 288590
2016-12-03 18:22:49 +00:00
Sanjay Patel 9d5b5e38bb [InstSimplify] add more helper functions for SimplifyICmpInst; NFCI
llvm-svn: 288589
2016-12-03 18:03:53 +00:00
Sanjay Patel dc65a27a10 [InstSimplify] add helper functions for SimplifyICmpInst; NFCI
llvm-svn: 288588
2016-12-03 17:30:22 +00:00
Craig Topper c210827b53 [AVX-512] Add EVEX VPMADDUBSW and VPMADDWD to the load folding tables.
llvm-svn: 288587
2016-12-03 17:19:15 +00:00
Eric Liu 033b3a8b25 [clang-move] don't miss ',' in json output when there are duplicate elements.
llvm-svn: 288586
2016-12-03 15:28:03 +00:00
Rafael Espindola 27004d336f Ignone SHF_INFO_LINK.
Some elf producers (dtrace) put this flag in relocation sections and
some (MC) don't. If we don't ignore the flag we end up with multiple
relocation sections poiting to the same section, which we don't
support.

llvm-svn: 288585
2016-12-03 15:26:18 +00:00
Sanjay Patel b7f8cb698c [InstCombine] change select type to eliminate bitcasts
This solves a secondary problem seen in PR6137:
https://llvm.org/bugs/show_bug.cgi?id=6137#c6

This is similar to the bitwise logic op fold added with:
https://reviews.llvm.org/rL287707

And like that patch, I'm artificially restricting the
transform from vector <-> scalar types until we're sure
that the backend can handle that. 

llvm-svn: 288584
2016-12-03 15:25:16 +00:00
Sergey Kalinichev bbcf74f585 [libclang] Fix python tests
It was broken in r286421

llvm-svn: 288582
2016-12-03 12:53:06 +00:00
George Rimar 1b3d34a298 [ELF] - Implemented R_386_16 and R_386PC16 relocations
A program or object file using R_386_8, R_386_16, R_386_PC16 or R_386_PC8
relocations is not conformant to latest ABI. The R_386_16, and R_386_8
relocations truncate the computed value to 16 - bits and 8 - bits
respectively. R_386_PC16 and R_386_16 are used by some
applications, for example by FreeBSD loaders.

Previously we did not take addend in account for these relocation,
counting it as 0, what is wrong and was a reason of hangs.

This patch needed for example for FreeBSD pmbr (protective mbr).

Differential revision: https://reviews.llvm.org/D27303

llvm-svn: 288581
2016-12-03 07:30:30 +00:00
George Rimar 40c28c7f9a [ELF] - Change the way how we compute offsets for binary output.
Binary output feature is a bit confuzing. bfd and gold output differs a lot sometimes,
though it is important for FreeBSD mbr loaders.

Patch change the way how we compute file offsets for binary output.
This fixes PR31196.

Previously offsets were calculated basing on offsets and addresses of sections
from the same loads:
if (Sec == First)
  return alignTo(Off, Target->MaxPageSize, Sec->Addr);
return First->Offset + Sec->Addr - First->Addr;

bfd assigns offsets for each section to VA - MinVA:
https://github.com/redox-os/binutils-gdb/blob/master/bfd/binary.c#L27
https://github.com/redox-os/binutils-gdb/blob/master/bfd/binary.c#L255 
(LMA == VA usually)

This patch for now just stops creating phdrs for binary output. 
An effect from this that no any additional calculation for offset is performed:

uintX_t getFileAlignment(uintX_t Off, OutputSectionBase *Sec) {
OutputSectionBase *First = Sec->FirstInPtLoad;
// If the section is not in a PT_LOAD, we have no other constraint.
if (!First)
  return Off; //**First is always null, condition always happens**

That is enough now with combination of another patch to generate output
that is similar to what bfd produce for mbr loader.

Differential revision: https://reviews.llvm.org/D27341

llvm-svn: 288580
2016-12-03 07:23:30 +00:00
George Rimar d250618c3e [ELF] - Disable relro when -omagic specified.
--omagic is an option to create old-fashioned executables in which
.text segments are writable. Today, the option is still in use to
create special-purpose programs such as boot loaders. It doesn't
make sense to create PT_GNU_RELRO for such executables.

DIfferential revision: https://reviews.llvm.org/D27297

llvm-svn: 288579
2016-12-03 07:09:28 +00:00
Craig Topper 8e7498976a [X86] Fix VEX encoded VPMADDUBSW to not be marked commutable.
This was accidentallly broken in r285515 when we started lowering the intrinsic to an ISD node. Should fix PR31241.

llvm-svn: 288578
2016-12-03 05:35:44 +00:00
Craig Topper da73a09fcd [X86] Add test cases demonstrating where we incorrectly commute VEX VPMADDUSBW due to a bug introduced in r285515.
I believe this is the cause of PR31241.

llvm-svn: 288577
2016-12-03 05:35:38 +00:00
Eric Fiselier 0c6d89d614 Turn off testsuite warnings by default with GCC
llvm-svn: 288576
2016-12-03 03:29:45 +00:00
Eric Fiselier 613dc646d3 Make make_exception_ptr abort with -fno-exceptions
llvm-svn: 288575
2016-12-03 03:22:11 +00:00
Eric Fiselier 9a0b4abbba Mark various <variant> items as complete
llvm-svn: 288574
2016-12-03 02:47:40 +00:00
Eric Fiselier 46fcbb4da4 Work around more -Wshadow warnings
llvm-svn: 288573
2016-12-03 02:26:28 +00:00
Michael Kuperstein 997dac8709 Remove stale comment. NFC.
llvm-svn: 288572
2016-12-03 01:59:13 +00:00
Eric Fiselier 63322af698 Fix <variant> w/o exception support
llvm-svn: 288571
2016-12-03 01:58:07 +00:00
Saleem Abdulrasool 25dbdfa0ac Sema: delay the DLL exported member referencing
An explicit template specialization can cause the implicit template
specialization of a type which inherits the attributes.  In such a case, we
would end up with a delayed template specialization for a dll exported type
which we would fail to reference.  This would trigger an assertion.

We now propagate the dll storage attributes through the inheritance
chain.  Only after having done so do we reference the delayed template
specializations.  This allows any implicit specializations which inherit dll
storage to also be referenced.

llvm-svn: 288570
2016-12-03 01:57:47 +00:00
Haicheng Wu 584042981d [TTI/CostModel] Correct the way getGEPCost() calls isLegalAddressingMode()
Fix a bug when we call isLegalAddressingMode() from getGEPCost().

Differential Revision: https://reviews.llvm.org/D27357

llvm-svn: 288569
2016-12-03 01:57:24 +00:00
Kostya Serebryany 520753a321 [sanitizer-coverage] use IRB.SetCurrentDebugLocation after IRB.SetInsertPoint
llvm-svn: 288568
2016-12-03 01:43:30 +00:00
Matthias Braun a39c2ca44e testcase only works in a debug build
llvm-svn: 288567
2016-12-03 01:42:32 +00:00
Eric Fiselier f9353d89be Revert workaround for Clang bug. Thanks to Richard for the quick fix
llvm-svn: 288566
2016-12-03 01:28:01 +00:00
Eric Fiselier 283d8d45db [Sema] Don't perform aggregate initialization for types with explicit constructors
Summary:
The C++17 rules for aggregate initialization changed to disallow types with explicit constructors [dcl.init.aggr]p1. This patch implements that new rule.


Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25654

llvm-svn: 288565
2016-12-03 01:26:47 +00:00
Eric Fiselier 572e6deeb7 Fix -Wshadow warnings and enable warnings by default for C++ >= 11
llvm-svn: 288564
2016-12-03 01:21:40 +00:00
Richard Smith 4baaa5ab52 DR616, and part of P0135R1: member access (or pointer-to-member access) on a
temporary produces an xvalue, not a prvalue. Support this by materializing the
temporary prior to performing the member access.

llvm-svn: 288563
2016-12-03 01:14:32 +00:00
Mehdi Amini 05049bed02 [doc] Add .arcconfig setup to the "how to work with a monorepo" section
llvm-svn: 288562
2016-12-03 01:04:40 +00:00
Matthias Braun 1fbb0f6dd9 AArch64CollectLOH: Rewrite as block-local analysis.
Previously this pass was using up to 5% compile time in some cases which
is a bit much for what it is doing. The pass featured a full blown
data-flow analysis which in the default configuration was restricted to a
single block.

This rewrites the pass under the assumption that we only ever work on a
single block. This is done in a single pass maintaining a state machine
per general purpose register to catch LOH patterns.

Differential Revision: https://reviews.llvm.org/D27329

llvm-svn: 288561
2016-12-03 00:52:56 +00:00
Guozhi Wei 835de1f3ab [ppc] Correctly compute the cost of loading 32/64 bit memory into VSR
VSX has instructions lxsiwax/lxsdx that can load 32/64 bit value into VSX register cheaply. That patch makes it known to memory cost model, so the vectorization of the test case in pr30990 is beneficial.

Differential Revision: https://reviews.llvm.org/D26713

llvm-svn: 288560
2016-12-03 00:41:43 +00:00
Eric Fiselier 33f947057d XFAIL variant tests for apple-clang
llvm-svn: 288559
2016-12-03 00:33:03 +00:00
Richard Smith 3a8f13ac23 PR31244: Use the exception specification from the callee's type directly to
compute whether a call is noexcept, even if we can't map the callee expression
to a called declaration.

llvm-svn: 288558
2016-12-03 00:29:06 +00:00
Eric Fiselier 465bd0fc00 Enable warnings by default for C++ >= 11 and fix -Wshadow occurances
llvm-svn: 288557
2016-12-03 00:27:13 +00:00
Eric Fiselier d7a50d1d6b Work around Clang 3.8 bugs
llvm-svn: 288556
2016-12-03 00:13:33 +00:00
Eric Fiselier 5877920183 Fix C++03 build
llvm-svn: 288555
2016-12-02 23:41:18 +00:00
Eric Fiselier 918f32fc7b Make variant's index part of the hash value
llvm-svn: 288554
2016-12-02 23:38:31 +00:00
Ivan Krasin 75453b057b Support escaping in TrigramIndex.
Summary:
This is a follow up to r288303, where I have introduced TrigramIndex
to speed up SpecialCaseList for the cases when all rules are
simple wildcards, like *hello*wor.d*.

Here, I add support for escaping, so that it's possible to
specify rules like *c\+\+abi*.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27318

llvm-svn: 288553
2016-12-02 23:30:16 +00:00
Eric Fiselier cb3ef1561d Fix generated warnings in <variant>
llvm-svn: 288552
2016-12-02 23:17:33 +00:00
Eric Fiselier c7a28dee10 Update darwin ABI list for <variant>
llvm-svn: 288551
2016-12-02 23:14:18 +00:00
Eric Fiselier aa97dee358 Update ABI lists for <variant>
llvm-svn: 288550
2016-12-02 23:11:28 +00:00
Zachary Turner 6fa57ad9bd Resubmit "[LibFuzzer] Split FuzzerUtil for Posix and Windows."
This resubmits r288529, which was resubmitted because it broke a
fuzzer bot.  According to kcc@ the test that broke was flakey
and it is unlikely to be a result of this patch.

llvm-svn: 288549
2016-12-02 23:02:01 +00:00
Richard Smith 01d96986d8 More diagnostic name fixups: w_ -> warn_, warning_ -> warn_, not_ -> note_.
In passing, add a warning group for "ignored qualifier in inline assembly" warnings.

llvm-svn: 288548
2016-12-02 23:00:28 +00:00
Eric Fiselier 0d3d8de014 Implement C++17 <variant>. Patch from Michael Park!
This patch was reviewed as https://reviews.llvm.org/D23263.

llvm-svn: 288547
2016-12-02 23:00:05 +00:00
Saleem Abdulrasool 1882002c91 CodeGen: export typeinfo and typeinfo name on itanium
When a C++ record is marked with dllexport mark both the typeinfo and the
typeinfo name as being exported.  Handle dllimport as the inverse.  This applies
to the itanium environment and not the MinGW environment.

llvm-svn: 288546
2016-12-02 22:46:18 +00:00
Richard Smith f881267db9 Mass-rename the handful of error_* diagnostics to err_*.
llvm-svn: 288545
2016-12-02 22:38:31 +00:00
Eric Fiselier 13b6cc4b08 Work around a bug in Clang's implementation of noexcept function types
llvm-svn: 288544
2016-12-02 22:30:52 +00:00
Richard Smith 366bb54f81 Check for SD-6 feature test macro when determining which tests should be
available, rather than #ifdef'ing away the relevant tests if it's unavailable.

llvm-svn: 288543
2016-12-02 22:14:59 +00:00
Kuba Mracek 9757a934a2 Update test expectations after AddressSanitizer text descriptions changed in r288535.
llvm-svn: 288542
2016-12-02 22:11:26 +00:00
Jacques Pienaar 3bec3ef6cd [lanai] Custom lowering of SHL_PARTS
Summary: Implement custom lowering of SHL_PARTS to enable lowering of left shift with larger than 32-bit shifts.

Reviewers: eliben, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27232

llvm-svn: 288541
2016-12-02 22:01:28 +00:00