Jerry Zhao
966e09907c
Merge pull request #1500 from firesim/renameserial
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Rename SerialBridge to TSIBridge
2023-05-10 11:37:26 -07:00
abejgonzalez
2872508624
Update docs | Revert cpp-lint CI changes
2023-05-09 11:24:26 -07:00
Jerry Zhao
5f9bf2b42b
Rename SerialBridge to TSIBridge
2023-05-08 15:21:38 -07:00
abejgonzalez
779f9a9b51
Try new clang-format ci check | Fix Scala test path
2023-05-07 20:50:43 -07:00
abejgonzalez
49c110480b
Fix metasims | More fixes/debug
2023-05-07 17:49:46 -07:00
abejgonzalez
f2199ea217
Fix more docs
2023-05-07 00:17:56 -07:00
abejgonzalez
49392505f6
Fix some CI issues
2023-05-06 17:56:45 -07:00
abejgonzalez
5fb2a23de6
Small cleanup
2023-05-06 16:58:49 -07:00
abejgonzalez
24429ad623
Address review comments
2023-05-06 16:19:34 -07:00
abejgonzalez
7e7feff0e2
Merge remote-tracking branch 'og/main' into ntnu-integration
2023-05-06 15:58:36 -07:00
abejgonzalez
3eb4a88776
Doc. Rework [ci skip]
2023-05-06 15:49:29 -07:00
abejgonzalez
f6fc4ccfec
Intermediate changes [ci skip]
2023-05-04 23:35:56 -07:00
abejgonzalez
c231ca15f4
First attempt at bare Xilinx U250 support
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Co-authored-by: Abraham Gonzalez <abe.gonzalez@berkeley.edu>
Co-authored-by: Björn Gottschall <info@gottschall.no>
Co-authored-by: David Metz <david.c.metz@ntnu.no>
2023-05-03 01:07:15 -07:00
Sagar Karandikar
d8f94e187d
Fix first-time-user setup docs
2023-05-02 22:15:34 -07:00
Sagar Karandikar
86548885ba
fix docs underline
2023-04-27 22:06:53 +00:00
Sagar Karandikar
43ffbc854c
fix doc
2023-04-27 21:22:21 +00:00
Sagar Karandikar
5f152c2c73
manager support for custom TARGET_PROJECTs (fasedtests, etc.) up to/including firesim infrasetup and buildbitstream
2023-04-27 21:11:31 +00:00
Sagar Karandikar
823a6abc82
create separate security group for build/run farm instances that is only accessible from within the firesim VPC
2023-04-20 22:42:40 +00:00
abejgonzalez
c12936b24f
Update docs to not use password
2023-04-14 17:52:13 -07:00
Abraham Gonzalez
f59b064b0f
Merge pull request #1478 from firesim/tsondhi/conda-lock-gene-adjustments
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Fix conda lockfile docs / make lockfile generation easier
2023-03-29 10:17:48 -07:00
Nikos Ch. Papadopoulos
ab54bcb44a
Fix typos in Vitis docs
2023-03-23 15:09:32 +02:00
abejgonzalez
aa34b44c0c
Fix doc review comments
2023-03-22 17:20:14 -07:00
Tushar Sondhi
5b2b7e9aa8
make it easier to adjust lockfile without changing the repo setup
2023-03-22 22:01:17 +00:00
abejgonzalez
4d54d40122
Merge remote-tracking branch 'origin/main' into local-fpga-docs
2023-03-21 23:07:46 -07:00
abejgonzalez
aa26abc8dd
Update symlinks | Update docs | machine-launch.sh now executable
2023-03-21 23:07:20 -07:00
abejgonzalez
afaf76f4c5
Update help output
2023-03-14 17:59:10 -07:00
abejgonzalez
21755c0a4f
Move Vitis build recipe into mainstream build/build_recipe.yaml | Update docs
2023-03-11 19:00:03 -08:00
abejgonzalez
cbfc9a6430
Merge remote-tracking branch 'origin/main' into local-fpga-docs
2023-03-11 15:49:21 -08:00
Abraham Gonzalez
26bb89d5f5
Merge pull request #1460 from firesim/al2
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Support AL2 manager instances
2023-03-11 14:11:39 -08:00
abejgonzalez
0ed7e80f9b
Move things back
2023-03-10 14:54:10 -08:00
abejgonzalez
809ff9b67a
More caveats added
2023-03-10 13:47:45 -08:00
abejgonzalez
76d24d15f1
Silently support AL2 manager instances
2023-03-10 11:25:30 -08:00
abejgonzalez
d5e8637bd9
More docs fixes | Add os to imports
2023-03-08 13:13:36 -08:00
abejgonzalez
2441e0618f
Update docs
2023-03-07 16:36:38 -08:00
abejgonzalez
5ba99537a7
Add build_farm_tag for AWS EC2 build farms
2023-03-07 14:35:06 -08:00
abejgonzalez
cee6660a89
Add extra checks
2023-03-06 16:56:42 -08:00
abejgonzalez
d826776d6c
Update docs w/ fixes
2023-03-05 17:40:33 -08:00
abejgonzalez
5ee9b52fa6
Update references in conda / to advanced docs
2023-03-05 14:42:06 -08:00
abejgonzalez
f868560d5b
Add building xclbin documentation | Add hwdb entry to running section
2023-03-05 14:35:53 -08:00
abejgonzalez
b9b2699871
New U250 FPGA tutorial
2023-03-04 17:51:05 -08:00
abejgonzalez
0cb85815a0
Rename doc folders specific to AWS
2023-03-04 16:20:49 -08:00
abejgonzalez
6b72e41d34
Update CI check + docs
2023-03-02 13:27:05 -08:00
Benjamin Morse
a63571066f
Add URI support to tarball path and xclbin path ( #1432 )
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* driver_tar and xclbin keys can now be a URI
* non URI paths are also supported, with relative paths being relative to the deploy folder
* adds documentation about URI support
* URI are tried 4 times with a 1 second delay after failure
* run-basic-linux-poweroff CI job is now serialized behind run-parallel-verilator-metasims to improve CI reliability
Co-authored-by: Filip Stamenkovic <92741622+filipstamenkovic-sifive@users.noreply.github.com>
Co-authored-by: Abraham Gonzalez <abe.j.gonza@gmail.com>
Co-authored-by: Tim Snyder <timothy.snyder@sifive.com>
2023-03-01 23:04:48 -08:00
Tim Snyder
39b2711f48
Update doc of always_expand_run_farm for rename ( #1427 )
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* Update doc of always_expand_run_farm for rename
At some point @abejgonzalez renamed the option from `always_expand_runfarm` to `always_expand_run_farm` because that is more "readable".
This just updates the docs so that they align with the code.
* Update docs/Advanced-Usage/Manager/Manager-Configuration-Files.rst
2023-02-25 12:14:15 -06:00
Nandor Licker
30fd72bc7f
Remove `constructor.h` and replace it with a Scala-generated header ( #1398 )
2023-02-08 00:52:51 +02:00
Abraham Gonzalez
9d3462ed13
Merge pull request #1392 from firesim/scala213
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Bump to latest rocket-chip/scala2.13
2023-02-01 14:30:09 -08:00
Nandor Licker
2889818e7d
Removed the compiler-generated runtime config ( #1422 )
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The default arguments to FASED memory models are now passed alongside other FASED bridge arguments.
These defaults can be overriden by other args passed to the bridge driver or disabled when the raw hardware configuration is requested.
The manager can still pass an optional runtime config to the design to override arguments.
2023-02-01 19:19:00 +02:00
abejgonzalez
479242c068
Bump xclbin
2023-01-31 22:05:32 -08:00
Abraham Gonzalez
831d68df6a
Force using 2022.1 Vitis
2023-01-26 17:36:57 -08:00
Abraham Gonzalez
89972c492b
Merge pull request #1397 from firesim/update-vitis-docs
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Update Vitis docs | Bump FPGA platform to 2022.1
2023-01-26 11:22:00 -08:00