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56 Commits

Author SHA1 Message Date
tootal 9c317e1f13
Update README.md (#46) 
fix Bracket mismatch

Co-authored-by: tootal <tootal@yeah.net>
 2020-11-17 11:27:37 +08:00
SunnyChen a2e59ec79b Update demo 2020-11-16 21:22:16 +08:00
bt_guo c3dc8c6471
add decoupled (#50) 2020-11-15 17:16:20 +08:00
bt_guo 4607b37814
add map and orR (#48) 2020-11-07 22:50:09 +08:00
SunnyChen 74311bbe80 fix S() bug 2020-06-15 21:28:00 +08:00
Sunny Chen 8629b9b4cd
Update README.md 2020-05-13 10:51:01 +08:00
Sunny Chen 821d159fc8
Update README.md 2020-05-13 10:50:29 +08:00
Sunny Chen d25fe62ef1
Update README.md 2020-05-06 11:48:14 +08:00
Sunny Chen 65b361e741
Update README.md 2020-05-06 11:47:25 +08:00
SunnyChen 6551b78d05 Update 2020-05-06 11:46:43 +08:00
Gaufoo dc423dd265
firrtl: fix lit issue (#44) 2020-01-06 11:59:10 +08:00
Gaufoo ed45dc4380
setup: add requirements (#43) 2020-01-05 20:49:54 +08:00
Gaufoo 7d69f7b4fc
setup: update readme & upload to pypi (#42) 2020-01-05 20:27:40 +08:00
Gaufoo 3c73b6f55b
core: add some ops: xor and or (#41) 2020-01-05 17:42:51 +08:00
Gaufoo 04e2178196
conv: preliminary completion (#40) 2020-01-05 15:57:42 +08:00
Gaufoo 62b09da428
core: add json serialize (#39) 2020-01-02 16:42:19 +08:00
Gaufoo a05ab12ea5
core: inherit (#38) 
* core: inherit

* codestyple
 2019-12-20 13:17:39 +08:00
Gaufoo 201651fefd
core: add vector (#37) 2019-12-19 02:16:01 +08:00
Gaufoo 76ee4187c6
core: add vec, bundle (#36) 2019-12-18 19:17:29 +08:00
Gaufoo 0c27b06a09
core: module inst (#35) 2019-12-18 02:19:16 +08:00
Gaufoo 097d59e372
fix (#34) 2019-12-17 22:18:07 +08:00
Gaufoo 011a8ff657
core: pritty print (#33) 2019-12-17 20:20:54 +08:00
Gaufoo adb6cc6271
core: add expr & type infra (#31) 
* core: add type check

* core: add expr & type infra

* core: add wire dsl
 2019-12-16 17:19:26 +08:00
Gaufoo 9f5fa617fd
core: branch + check (#30) 2019-12-09 20:49:43 +08:00
Gaufoo dc4946d8f0
dsl: statement up (#29) 2019-12-02 17:47:17 +08:00
Gaufoo 3f91cbf6bd
dsl: add io (#28) 2019-11-29 20:10:57 +08:00
Gaufoo 0785010acc
dsl: pre work (#27) 2019-11-29 16:18:12 +08:00
Gaufoo 664322cc11
test_firrtl_ir: add serialize (#26) 2019-11-19 23:34:10 +08:00
LemniscateX bcfae9b41a test_firrtl_ir: using auto tester to rewrite op tests (#25) 2019-11-18 22:36:16 +08:00
Gaufoo c1d76bd49a
test_firrtl_ir: refactor (#24) 2019-11-18 01:23:23 +08:00
LemniscateX 0ec61e16c9 test_firrtl_ir: add auto tester (#23) 2019-11-17 22:27:08 +08:00
Gaufoo c75dcbd799
test_firrtl_ir: add statement tests(cond, defmod, defcir, block) (#22) 2019-11-17 22:02:44 +08:00
Gaufoo 4809e03592
test_firrtl_ir: add def tests (instance memory node register wire) (#21) 
* test_firrtl_ir: add def tests (instance memory node register wire)

* test_firrtl_ir: make style check happy
 2019-11-17 20:41:07 +08:00
Gaufoo bf6d12045a
firrtl_ir: add statements (block, conditionally, connect, empty) (#20) 2019-11-17 17:28:10 +08:00
Gaufoo 88feb5159a
firrtl_ir: add some statements (#19) 2019-11-17 12:40:12 +08:00
Gaufoo 0304688f4e
firrtl_ir: refact (#18) 2019-11-17 11:31:33 +08:00
LemniscateX 60e805fae7 test_firrtl_ir: add prim_ops (rem comp logic neg cat bits) tests (#17) 2019-11-17 01:53:18 +08:00
Gaufoo 52d14746cf
test_firrtl_ir: add literal test (#16) 
* test_firrtl_ir: add literal test

* firrtl_ir: clean width
 2019-11-17 00:49:25 +08:00
Gaufoo 999c3ef85c
test_firrtl_ir: add mux test (#15) 2019-11-16 22:41:51 +08:00
Gaufoo f9409e4065
firrtl_ir: add type check guard (#14) 2019-11-16 17:33:54 +08:00
LemniscateX 10383d51fa test_firrtl_ir: add prim_ops (sub mul div) tests (#13) 2019-11-16 16:28:23 +08:00
Gaufoo 84dc417726
firrtl_ir: add accessor (#12) 2019-11-16 12:41:51 +08:00
Gaufoo 8aa1171f84
firrtl_ir: add checker & measurer (#11) 2019-11-16 03:31:42 +08:00
Gaufoo 9f30541c5f
firrtl_ir: eliminate unknown (#10) 2019-11-15 23:55:34 +08:00
Gaufoo 9df6f0e851
firrtl_ir: add some ops (#9) 2019-11-15 22:54:21 +08:00
LemniscateX 6e48d60b63 add type_neq test (#8) 2019-11-15 21:15:56 +08:00
LemniscateX f0baa020be add type_neq test (#7) 2019-11-15 20:47:45 +08:00
Gaufoo 352fa8408a
firrtl_ir: add type check (#6) 
* firrtl_ir: add lit

* firrtl_ir: add type check
 2019-11-15 18:03:44 +08:00
Gaufoo 1544748ec0 firrtl_ir: add field 2019-11-13 01:26:37 +08:00
Gaufoo a841bedbd1 firrtl_ir: add uint/sint test 2019-11-13 00:14:46 +08:00