mirror of https://github.com/llvm/circt.git
b89f54f2bf
Only attempt to promote variables with packed types during mem2reg. Also run the `basic.sv` test of ImportVerilog through `circt-verilog` as a sanity check of the transformations done by the tool. |
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| .. | ||
| Analysis | ||
| Bindings | ||
| CAPI | ||
| Conversion | ||
| Dialect | ||
| Firtool | ||
| Reduce | ||
| Scheduling | ||
| Support | ||
| Target | ||
| Tools | ||
| Transforms | ||
| CMakeLists.txt | ||