cepheus acb558822f [Moore] SymbolVisibility attribute support for SVModuleOp (#7278) ... We can append the appropriate symbol visibility to svmoduleOp according to the structures of instanceSymbol provided by the slang front-end. slang provides a function to get the root of the design. Calling this method could get all top-level instanceSymbols and help determine which ones should be tagged. Note that the visibility attribute now used does not contain the `nested`.		2024-07-09 12:03:18 +08:00
..
Arc	[Arc] Add VectorizeOp canonicalization (#7146)	2024-07-02 16:29:04 -07:00
Calyx	[Calyx] Fix memory import locations (#6769)	2024-02-29 15:02:37 -05:00
Comb	Bump LLVM (#7223)	2024-06-26 13:19:37 -07:00
DC	[HW] round trip ModuleType non-ssa values (#6287)	2023-10-13 14:25:00 -07:00
Debug	[Debug] Add scope op (#6454)	2023-12-08 09:38:46 -08:00
ESI	[ESI] Fix use-after-erase bug in connect services lowering	2024-07-05 11:30:44 +00:00
Emit	[Emit] Organize output files using the `emit` dialect (#6727)	2024-02-24 10:09:00 +02:00
FIRRTL	[FIRRTL][ModuleInliner] Add a prefix to memory instances (#7279)	2024-07-09 07:33:35 +09:00
FSM	[HW] Change printer for modules (#6205)	2023-09-28 16:30:15 -05:00
HW	Bump LLVM (#7223)	2024-06-26 13:19:37 -07:00
HWArith	LLVM Bump (#6322)	2023-10-20 09:53:39 -07:00
Handshake	Bump LLVM (#7223)	2024-06-26 13:19:37 -07:00
Ibis	[Ibis] Divorce symbol and actual names in class and container ops (#7123)	2024-06-10 10:06:16 +02:00
Interop	[HW] Change printer for modules (#6205)	2023-09-28 16:30:15 -05:00
LLHD	Bump LLVM (#7223)	2024-06-26 13:19:37 -07:00
LTL	[FIRRTL][Verif][LTL] Replace `ltl.disable` with an enable folded into `verif.assert` (#7150)	2024-06-20 11:24:37 -07:00
LoopSchedule	bump llvm submodule to tip of main (103fa3250c46) (#6589)	2024-01-19 09:45:35 -06:00
MSFT	[MSFT] Remove ChannelOp	2024-02-08 17:32:55 +00:00
Moore	[Moore] SymbolVisibility attribute support for SVModuleOp (#7278)	2024-07-09 12:03:18 +08:00
OM	[OM] Separate OM object fields verifier to a dedicated pass (#7026)	2024-05-14 11:24:02 +09:00
Pipeline	[Pipeline] Remove `Pure` trait from Pipeline operations (#6888)	2024-04-03 11:44:09 +02:00
SMT	[SMT] Minor width related fixes for BitVectorAttr (#6900)	2024-04-05 14:51:12 +02:00
SSP	[SSP] Add pass to roundtrip via the scheduling infra. (#4373)	2022-11-30 16:19:58 +13:00
SV	Bump LLVM (#7223)	2024-06-26 13:19:37 -07:00
Seq	[Seq] Fix incorrect folder (#7085)	2024-05-24 18:26:16 +09:00
Sim	[Sim] Add DPI func/call and lowering (#7042)	2024-06-13 19:11:56 +09:00
SystemC	LLVM Bump (#6322)	2023-10-20 09:53:39 -07:00
Verif	[FIRRTL][Verif][LTL] Replace `ltl.disable` with an enable folded into `verif.assert` (#7150)	2024-06-20 11:24:37 -07:00