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bump llvm submodule to tip of main (103fa3250c46) (#6589)

This commit is contained in:
Megan Wachs 2024-01-19 07:45:35 -08:00 committed by GitHub
parent 3a8733e88f
commit 28d430dd25
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GPG Key ID: B5690EEEBB952194
26 changed files with 65 additions and 65 deletions
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6
include/circt/Dialect/Calyx/CalyxLoweringUtils.h
View File

@ -546,7 +546,7 @@ public:
// Do the actual rewrite, marking this op as updated. Because the op is
// marked as updated, the pattern driver will re-enqueue the op again.
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
op, [&] { partialPatternRes = partiallyLower(op, rewriter); });
// Mark that this pattern has been applied to this op.
@ -557,7 +557,7 @@ public:
// Hook for subclasses to lower the op using the rewriter.
//
// Note that this call is wrapped in `updateRootInPlace`, so any direct IR
// Note that this call is wrapped in `modifyOpInPlace`, so any direct IR
// mutations that are legal to apply during a root update of op are allowed.
//
// Also note that this means the op will be re-enqueued to the greedy
@ -615,7 +615,7 @@ public:
// Hook for subclasses to lower the op using the rewriter.
//
// Note that this call is wrapped in `updateRootInPlace`, so any direct IR
// Note that this call is wrapped in `modifyOpInPlace`, so any direct IR
// mutations that are legal to apply during a root update of op are allowed.
//
// Also note that this means the op will be re-enqueued to the greedy

2
lib/Conversion/AffineToLoopSchedule/AffineToLoopSchedule.cpp
View File

@ -216,7 +216,7 @@ struct IfOpHoisting : OpConversionPattern<IfOp> {
LogicalResult
matchAndRewrite(IfOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
if (!op.thenBlock()->without_terminator().empty()) {
rewriter.splitBlock(op.thenBlock(), --op.thenBlock()->end());
rewriter.inlineBlockBefore(&op.getThenRegion().front(), op);

6
lib/Conversion/CFToHandshake/CFToHandshake.cpp
View File

@ -82,7 +82,7 @@ public:
/// A partial lowering function may only replace a subset of the operations
/// within the funcOp currently being lowered. However, the dialect conversion
/// scheme requires the matched root operation to be replaced/updated, if the
/// match was successful. To facilitate this, rewriter.updateRootInPlace
/// match was successful. To facilitate this, rewriter.modifyOpInPlace
/// wraps the partial update function.
/// Next, the function operation is expected to go from illegal to legalized,
/// after matchAndRewrite returned true. To work around this,
@ -103,7 +103,7 @@ public:
matchAndRewrite(Operation *op, ArrayRef<Value> /*operands*/,
ConversionPatternRewriter &rewriter) const override {
assert(isa<TOp>(op));
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
op, [&] { loweringRes = fun(dyn_cast<TOp>(op), rewriter); });
target.loweredOps[op] = true;
return loweringRes;
@ -171,7 +171,7 @@ public:
LogicalResult
matchAndRewrite(Operation *op, ArrayRef<Value> /*operands*/,
ConversionPatternRewriter &rewriter) const override {
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
op, [&] { loweringRes = fun(target.region, rewriter); });
target.opLowered = true;

4
lib/Conversion/HWToLLHD/HWToLLHD.cpp
View File

@ -72,7 +72,7 @@ struct ConvertHWModule : public OpConversionPattern<HWModuleOp> {
// Set the entity name attributes. Add block arguments for each output,
// since LLHD entity outputs are still block arguments to the op.
rewriter.updateRootInPlace(entity, [&] {
rewriter.modifyOpInPlace(entity, [&] {
entity.setName(module.getName());
entityBodyRegion.addArguments(
moduleOutputs, SmallVector<Location, 4>(moduleOutputs.size(),
@ -241,7 +241,7 @@ struct ConvertInstance : public OpConversionPattern<InstanceOp> {
// a ConnectOp rather than a PrbOp+DrvOp combo.
for (auto &use : llvm::make_early_inc_range(result.getUses())) {
if (isa<hw::OutputOp>(use.getOwner())) {
rewriter.updateRootInPlace(use.getOwner(), [&]() { use.set(sig); });
rewriter.modifyOpInPlace(use.getOwner(), [&]() { use.set(sig); });
}
}

2
lib/Conversion/SCFToCalyx/SCFToCalyx.cpp
View File

@ -1059,7 +1059,7 @@ struct FuncOpConversion : public calyx::FuncOpPartialLoweringPattern {
funcOp.getLoc(), rewriter.getStringAttr(funcOp.getSymName()), ports);
std::string funcName = "func_" + funcOp.getSymName().str();
rewriter.updateRootInPlace(funcOp, [&]() { funcOp.setSymName(funcName); });
rewriter.modifyOpInPlace(funcOp, [&]() { funcOp.setSymName(funcName); });
/// Mark this component as the toplevel.
compOp->setAttr("toplevel", rewriter.getUnitAttr());

2
lib/Conversion/SeqToSV/SeqToSV.cpp
View File

@ -264,7 +264,7 @@ public:
if (Operation *inputOp = adaptor.getInput().getDefiningOp())
if (!isa<mlir::UnrealizedConversionCastOp>(inputOp))
if (auto name = chooseName(op, inputOp))
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
inputOp, [&] { inputOp->setAttr("sv.namehint", name); });
rewriter.replaceOp(op, adaptor.getInput());

10
lib/Dialect/Arc/Transforms/ArcCanonicalizer.cpp
View File

@ -296,7 +296,7 @@ LogicalResult MemWritePortEnableAndMaskCanonicalizer::matchAndRewrite(
if (arcMapping.count(defOp.getNameAttr())) {
auto arcWithoutEnable = arcMapping[defOp.getNameAttr()];
// Remove the enable attribute
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
op.setEnable(false);
op.setArc(arcWithoutEnable.getValue());
});
@ -310,7 +310,7 @@ LogicalResult MemWritePortEnableAndMaskCanonicalizer::matchAndRewrite(
symbolCache.removeDefinitionAndAllUsers(defOp);
// Remove the enable attribute
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
op.setEnable(false);
op.setArc(newName);
});
@ -334,9 +334,9 @@ LogicalResult MemWritePortEnableAndMaskCanonicalizer::matchAndRewrite(
// Remove the enable output from the current arc
auto *terminator = defOp.getBodyBlock().getTerminator();
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
terminator, [&]() { terminator->eraseOperand(op.getEnableIdx()); });
rewriter.updateRootInPlace(defOp, [&]() {
rewriter.modifyOpInPlace(defOp, [&]() {
defOp.setName(newName);
defOp.setFunctionType(
rewriter.getFunctionType(defOp.getArgumentTypes(), newResultTypes));
@ -536,7 +536,7 @@ SinkArcInputsPattern::matchAndRewrite(DefineOp op,
else
newInputs.push_back(value);
}
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
callOp, [&]() { callOp.getArgOperandsMutable().assign(newInputs); });
for (auto value : maybeUnusedValues)
if (value.use_empty())

6
lib/Dialect/Arc/Transforms/GroupResetsAndEnables.cpp
View File

@ -113,7 +113,7 @@ struct EnableGroupingPattern : public OpRewritePattern<ClockTreeOp> {
scf::IfOp ifOp =
rewriter.create<scf::IfOp>(writeOps[0].getLoc(), enable, false);
for (auto writeOp : writeOps) {
rewriter.updateRootInPlace(writeOp, [&]() {
rewriter.modifyOpInPlace(writeOp, [&]() {
writeOp->moveBefore(ifOp.thenBlock()->getTerminator());
writeOp.getConditionMutable().erase(0);
});
@ -155,8 +155,8 @@ bool groupInRegion(Block *block, Operation *clockTreeOp,
continue;
// For some currently unknown reason, just calling moveBefore
// directly has the same output but is much slower
rewriter->updateRootInPlace(definition,
[&]() { definition->moveBefore(op); });
rewriter->modifyOpInPlace(definition,
[&]() { definition->moveBefore(op); });
changed = true;
worklist.push_back(definition);
}

2
lib/Dialect/Arc/Transforms/LatencyRetiming.cpp
View File

@ -153,7 +153,7 @@ LatencyRetimingPattern::matchAndRewrite(ClockedOpInterface op,
return;
}
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
stateOp.setLatency(newLatency);
if (!stateOp.getClock() && !isInClockDomain)
stateOp.getClockMutable().assign(clock);

8
lib/Dialect/Comb/CombFolds.cpp
View File

@ -75,8 +75,8 @@ static void replaceOpAndCopyName(PatternRewriter &rewriter, Operation *op,
if (auto *newOp = newValue.getDefiningOp()) {
auto name = op->getAttrOfType<StringAttr>("sv.namehint");
if (name && !newOp->hasAttr("sv.namehint"))
rewriter.updateRootInPlace(newOp,
[&] { newOp->setAttr("sv.namehint", name); });
rewriter.modifyOpInPlace(newOp,
[&] { newOp->setAttr("sv.namehint", name); });
}
rewriter.replaceOp(op, newValue);
}
@ -91,8 +91,8 @@ static OpTy replaceOpWithNewOpAndCopyName(PatternRewriter &rewriter,
auto newOp =
rewriter.replaceOpWithNewOp<OpTy>(op, std::forward<Args>(args)...);
if (name && !newOp->hasAttr("sv.namehint"))
rewriter.updateRootInPlace(newOp,
[&] { newOp->setAttr("sv.namehint", name); });
rewriter.modifyOpInPlace(newOp,
[&] { newOp->setAttr("sv.namehint", name); });
return newOp;
}

2
lib/Dialect/Comb/Transforms/LowerComb.cpp
View File

@ -56,7 +56,7 @@ public:
Value f = b.create<hw::ConstantOp>(loc, b.getIntegerAttr(b.getI1Type(), 0));
Value tree = getMux(loc, b, t, f, table, op.getInputs());
b.updateRootInPlace(tree.getDefiningOp(), [&]() {
b.modifyOpInPlace(tree.getDefiningOp(), [&]() {
tree.getDefiningOp()->setDialectAttrs(op->getDialectAttrs());
});
b.replaceOp(op, tree);

2
lib/Dialect/ESI/Passes/ESILowerPhysical.cpp
View File

@ -146,7 +146,7 @@ PureModuleLowering::matchAndRewrite(ESIPureModuleOp pureMod, OpAdaptor adaptor,
// Re-wire the inputs and erase them.
for (auto input : inputs) {
BlockArgument newArg;
rewriter.updateRootInPlace(hwMod, [&]() {
rewriter.modifyOpInPlace(hwMod, [&]() {
newArg = body->addArgument(input.getResult().getType(), input.getLoc());
});
rewriter.replaceAllUsesWith(input.getResult(), newArg);

16
lib/Dialect/FIRRTL/FIRRTLFolds.cpp
View File

@ -101,7 +101,7 @@ static void updateName(PatternRewriter &rewriter, Operation *op,
newName = chooseName(newOpName.getValue(), name.getValue());
// Only update if needed
if (!newOpName || newOpName.getValue() != newName)
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
op, [&] { op->setAttr("name", rewriter.getStringAttr(newName)); });
}
@ -1374,7 +1374,7 @@ public:
mlir::PatternRewriter &rewriter,
bool updateInPlace) const {
if (updateInPlace) {
rewriter.updateRootInPlace(mux, [&] {
rewriter.modifyOpInPlace(mux, [&] {
mux.setOperand(1, high);
mux.setOperand(2, low);
});
@ -1441,12 +1441,12 @@ public:
return failure();
if (Value v = tryCondTrue(mux.getHigh(), mux.getSel(), rewriter, true, 0)) {
rewriter.updateRootInPlace(mux, [&] { mux.setOperand(1, v); });
rewriter.modifyOpInPlace(mux, [&] { mux.setOperand(1, v); });
return success();
}
if (Value v = tryCondFalse(mux.getLow(), mux.getSel(), rewriter, true, 0)) {
rewriter.updateRootInPlace(mux, [&] { mux.setOperand(2, v); });
rewriter.modifyOpInPlace(mux, [&] { mux.setOperand(2, v); });
return success();
}
@ -1921,9 +1921,9 @@ struct NodeBypass : public mlir::RewritePattern {
if (node.getInnerSym() || !AnnotationSet(node).canBeDeleted() ||
node.use_empty() || node.isForceable())
return failure();
rewriter.startRootUpdate(node);
rewriter.startOpModification(node);
node.getResult().replaceAllUsesWith(node.getInput());
rewriter.finalizeRootUpdate(node);
rewriter.finalizeOpModification(node);
return success();
}
};
@ -3198,8 +3198,8 @@ LogicalResult ClockGateIntrinsicOp::canonicalize(ClockGateIntrinsicOp op,
if (auto testEnable = op.getTestEnable()) {
if (auto constOp = testEnable.getDefiningOp<ConstantOp>()) {
if (constOp.getValue().isZero()) {
rewriter.updateRootInPlace(op,
[&] { op.getTestEnableMutable().clear(); });
rewriter.modifyOpInPlace(op,
[&] { op.getTestEnableMutable().clear(); });
return success();
}
}

4
lib/Dialect/FIRRTL/Transforms/LowerClasses.cpp
View File

@ -1158,7 +1158,7 @@ struct ClassOpSignatureConversion : public OpConversionPattern<om::ClassOp> {
&result)))
return failure();
rewriter.updateRootInPlace(classOp, []() {});
rewriter.modifyOpInPlace(classOp, []() {});
return success();
}
@ -1184,7 +1184,7 @@ struct ClassExternOpSignatureConversion
&result)))
return failure();
rewriter.updateRootInPlace(classOp, []() {});
rewriter.modifyOpInPlace(classOp, []() {});
return success();
}

4
lib/Dialect/HW/ConversionPatterns.cpp
View File

@ -73,7 +73,7 @@ LogicalResult circt::doTypeConversion(Operation *op, ValueRange operands,
Operation *newOp = rewriter.create(state);
// Move the regions over, converting the signatures as we go.
rewriter.startRootUpdate(newOp);
rewriter.startOpModification(newOp);
for (size_t i = 0, e = op->getNumRegions(); i < e; ++i) {
Region &region = op->getRegion(i);
Region *newRegion = &newOp->getRegion(i);
@ -87,7 +87,7 @@ LogicalResult circt::doTypeConversion(Operation *op, ValueRange operands,
"type conversion failed");
rewriter.applySignatureConversion(newRegion, result, typeConverter);
}
rewriter.finalizeRootUpdate(newOp);
rewriter.finalizeOpModification(newOp);
rewriter.replaceOp(op, newOp->getResults());
return success();

2
lib/Dialect/HW/HWModuleOpInterface.cpp
View File

@ -59,7 +59,7 @@ static LogicalResult convertModuleOpTypes(HWModuleLike modOp,
return failure();
auto newType = ModuleType::get(rewriter.getContext(), newPorts);
rewriter.updateRootInPlace(modOp, [&] { modOp.setHWModuleType(newType); });
rewriter.modifyOpInPlace(modOp, [&] { modOp.setHWModuleType(newType); });
return success();
}

4
lib/Dialect/HW/HWOps.cpp
View File

@ -383,8 +383,8 @@ LogicalResult WireOp::canonicalize(WireOp wire, PatternRewriter &rewriter) {
// `sv.namehint` to the expression.
if (auto *inputOp = wire.getInput().getDefiningOp())
if (auto name = chooseName(wire, inputOp))
rewriter.updateRootInPlace(
inputOp, [&] { inputOp->setAttr("sv.namehint", name); });
rewriter.modifyOpInPlace(inputOp,
[&] { inputOp->setAttr("sv.namehint", name); });
rewriter.replaceOp(wire, wire.getInput());
return success();

2
lib/Dialect/HW/Transforms/HWSpecialize.cpp
View File

@ -167,7 +167,7 @@ struct ParametricTypeConversionPattern : public ConversionPattern {
llvm::SmallVector<Value, 4> convertedOperands;
// Update the result types of the operation
bool ok = true;
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
// Mutate result types
for (auto it : llvm::enumerate(op->getResultTypes())) {
FailureOr<Type> res =

8
lib/Dialect/Handshake/HandshakeOps.cpp
View File

@ -207,7 +207,7 @@ struct EliminateUnusedForkResultsPattern : mlir::OpRewritePattern<ForkOp> {
auto operand = op.getOperand();
auto newFork = rewriter.create<ForkOp>(
op.getLoc(), operand, op.getNumResults() - unusedIndexes.size());
rewriter.updateRootInPlace(op, [&] {
rewriter.modifyOpInPlace(op, [&] {
unsigned i = 0;
for (auto oldRes : llvm::enumerate(op.getResults()))
if (unusedIndexes.count(oldRes.index()) == 0)
@ -232,7 +232,7 @@ struct EliminateForkToForkPattern : mlir::OpRewritePattern<ForkOp> {
/// on if op is the single user of the value), but we'll let
/// EliminateUnusedForkResultsPattern apply in that case.
unsigned totalNumOuts = op.getSize() + parentForkOp.getSize();
rewriter.updateRootInPlace(parentForkOp, [&] {
rewriter.modifyOpInPlace(parentForkOp, [&] {
/// Create a new parent fork op which produces all of the fork outputs and
/// replace all of the uses of the old results.
auto newParentForkOp = rewriter.create<ForkOp>(
@ -364,7 +364,7 @@ struct EliminateCBranchIntoMuxPattern : OpRewritePattern<MuxOp> {
if (!secondParentCBranch || firstParentCBranch != secondParentCBranch)
return failure();
rewriter.updateRootInPlace(firstParentCBranch, [&] {
rewriter.modifyOpInPlace(firstParentCBranch, [&] {
// Replace uses of the mux's output with cbranch's data input
rewriter.replaceOp(op, firstParentCBranch.getDataOperand());
});
@ -738,7 +738,7 @@ LogicalResult EliminateSimpleControlMergesPattern::matchAndRewrite(
for (auto &use : llvm::make_early_inc_range(dataResult.getUses())) {
auto *user = use.getOwner();
rewriter.updateRootInPlace(
rewriter.modifyOpInPlace(
user, [&]() { user->setOperand(use.getOperandNumber(), merge); });
}

2
lib/Dialect/Ibis/Transforms/IbisCallPrep.cpp
View File

@ -166,7 +166,7 @@ void MergeCallArgs::rewrite(CallOp call, OpAdaptor adaptor,
method.getMethodName().getValue()));
// Update the call to use just the new struct.
rewriter.updateRootInPlace(call, [&]() {
rewriter.modifyOpInPlace(call, [&]() {
call.getOperandsMutable().clear();
call.getOperandsMutable().append(newArg.getResult());
});

8
lib/Dialect/SV/SVOps.cpp
View File

@ -1018,14 +1018,14 @@ LogicalResult CaseOp::canonicalize(CaseOp op, PatternRewriter &rewriter) {
if (op.getCaseStyle() == CaseStmtType::CaseXStmt) {
if (noXZ) {
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
op.setCaseStyleAttr(
CaseStmtTypeAttr::get(op.getContext(), CaseStmtType::CaseStmt));
});
return success();
}
if (noX) {
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
op.setCaseStyleAttr(
CaseStmtTypeAttr::get(op.getContext(), CaseStmtType::CaseZStmt));
});
@ -1034,7 +1034,7 @@ LogicalResult CaseOp::canonicalize(CaseOp op, PatternRewriter &rewriter) {
}
if (op.getCaseStyle() == CaseStmtType::CaseZStmt && noZ) {
rewriter.updateRootInPlace(op, [&]() {
rewriter.modifyOpInPlace(op, [&]() {
op.setCaseStyleAttr(
CaseStmtTypeAttr::get(op.getContext(), CaseStmtType::CaseStmt));
});
@ -1632,7 +1632,7 @@ LogicalResult WireOp::canonicalize(WireOp wire, PatternRewriter &rewriter) {
// If the wire has a name attribute, propagate the name to the expression.
if (auto *connectedOp = connected.getDefiningOp())
if (!wire.getName().empty())
rewriter.updateRootInPlace(connectedOp, [&] {
rewriter.modifyOpInPlace(connectedOp, [&] {
connectedOp->setAttr("sv.namehint", wire.getNameAttr());
});

14
lib/Dialect/Seq/SeqOps.cpp
View File

@ -707,8 +707,8 @@ LogicalResult ClockGateOp::canonicalize(ClockGateOp op,
if (auto testEnable = op.getTestEnable()) {
if (auto constOp = testEnable.getDefiningOp<hw::ConstantOp>()) {
if (constOp.getValue().isZero()) {
rewriter.updateRootInPlace(op,
[&] { op.getTestEnableMutable().clear(); });
rewriter.modifyOpInPlace(op,
[&] { op.getTestEnableMutable().clear(); });
return success();
}
}
@ -788,7 +788,7 @@ LogicalResult FirMemReadOp::canonicalize(FirMemReadOp op,
PatternRewriter &rewriter) {
// Remove the enable if it is constant true.
if (isConstAllOnes(op.getEnable())) {
rewriter.updateRootInPlace(op, [&] { op.getEnableMutable().erase(0); });
rewriter.modifyOpInPlace(op, [&] { op.getEnableMutable().erase(0); });
return success();
}
return failure();
@ -806,13 +806,13 @@ LogicalResult FirMemWriteOp::canonicalize(FirMemWriteOp op,
// Remove the enable if it is constant true.
if (auto enable = op.getEnable(); isConstAllOnes(enable)) {
rewriter.updateRootInPlace(op, [&] { op.getEnableMutable().erase(0); });
rewriter.modifyOpInPlace(op, [&] { op.getEnableMutable().erase(0); });
anyChanges = true;
}
// Remove the mask if it is all ones.
if (auto mask = op.getMask(); isConstAllOnes(mask)) {
rewriter.updateRootInPlace(op, [&] { op.getMaskMutable().erase(0); });
rewriter.modifyOpInPlace(op, [&] { op.getMaskMutable().erase(0); });
anyChanges = true;
}
@ -838,13 +838,13 @@ LogicalResult FirMemReadWriteOp::canonicalize(FirMemReadWriteOp op,
// Remove the enable if it is constant true.
if (auto enable = op.getEnable(); isConstAllOnes(enable)) {
rewriter.updateRootInPlace(op, [&] { op.getEnableMutable().erase(0); });
rewriter.modifyOpInPlace(op, [&] { op.getEnableMutable().erase(0); });
anyChanges = true;
}
// Remove the mask if it is all ones.
if (auto mask = op.getMask(); isConstAllOnes(mask)) {
rewriter.updateRootInPlace(op, [&] { op.getMaskMutable().erase(0); });
rewriter.modifyOpInPlace(op, [&] { op.getMaskMutable().erase(0); });
anyChanges = true;
}

4
lib/Transforms/InsertMergeBlocks.cpp
View File

@ -325,13 +325,13 @@ struct FuncOpPattern : public OpConversionPattern<func::FuncOp> {
LogicalResult
matchAndRewrite(func::FuncOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
rewriter.startRootUpdate(op);
rewriter.startOpModification(op);
if (!op.isExternal())
if (failed(insertMergeBlocks(op.getRegion(), rewriter)))
return failure();
rewriter.finalizeRootUpdate(op);
rewriter.finalizeOpModification(op);
rewrittenFuncs.insert(op);
return success();

2
lib/Transforms/MaximizeSSA.cpp
View File

@ -203,7 +203,7 @@ public:
matchAndRewrite(Operation *op, ArrayRef<Value> operands,
ConversionPatternRewriter &rewriter) const override {
LogicalResult conversionStatus = success();
rewriter.updateRootInPlace(op, [&] {
rewriter.modifyOpInPlace(op, [&] {
for (auto &region : op->getRegions()) {
SSAMaximizationStrategy strategy;
if (failed(maximizeSSA(region, strategy, rewriter)))

2
llvm

@ -1 +1 @@
Subproject commit 00b6d032a22196bc14e4e30e413c040eb1b65da4
Subproject commit 103fa3250c46b0c4cf04573c5e075185ca574016

6
test/Dialect/LoopSchedule/errors.mlir
View File

@ -1,4 +1,4 @@
// RUN: circt-opt %s -split-input-file -verify-diagnostics
// RUN: circt-opt %s -split-input-file -verify-diagnostics -allow-unregistered-dialect
func.func @combinational_condition() {
%c0_i32 = arith.constant 0 : i32
@ -67,11 +67,11 @@ func.func @only_stages() {
func.func @only_stages() {
%false = arith.constant 0 : i1
// expected-error @+1 {{'loopschedule.pipeline' op stages may only contain 'loopschedule.pipeline.stage' or 'loopschedule.terminator' ops, found %1 = "arith.addi"(%arg0, %arg0) : (i1, i1) -> i1}}
// expected-error @+1 {{'loopschedule.pipeline' op stages may only contain 'loopschedule.pipeline.stage' or 'loopschedule.terminator' ops, found "foo"() : () -> ()}}
loopschedule.pipeline II = 1 iter_args(%arg0 = %false) : (i1) -> () {
loopschedule.register %arg0 : i1
} do {
%0 = arith.addi %arg0, %arg0 : i1
"foo"() : () -> ()
loopschedule.terminator iter_args(), results() : () -> ()
}
return