Fabian Schuiki 1093a2aec8 [circt-verilog] Add missing if condition to gate pass verbosity ... Currently the verbose pass executions are enabled unconditionally. Gate this behind the command line option.		2025-05-15 09:55:08 -07:00
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CMakeLists.txt	[circt-verilog] Register func inliner extension	2025-02-03 20:51:16 +00:00
circt-verilog.cpp	[circt-verilog] Add missing if condition to gate pass verbosity	2025-05-15 09:55:08 -07:00