mirror of https://github.com/llvm/circt.git
21 lines
1.4 KiB
MLIR
21 lines
1.4 KiB
MLIR
// RUN: circt-opt --pass-pipeline='builtin.module(firrtl.circuit(firrtl-lower-intmodules{fixup-eicg-wrapper}))' --split-input-file --verify-diagnostics %s
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firrtl.circuit "EICGWithInstAnno" {
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firrtl.extmodule @EICG_wrapper(in in: !firrtl.clock, in test_en: !firrtl.uint<1>, in en: !firrtl.uint<1>, out out: !firrtl.clock) attributes {defname = "EICG_wrapper"}
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hw.hierpath private @nla [@EICGWithInstAnno::@ckg, @EICG_wrapper]
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firrtl.module @EICGWithInstAnno(in %clock: !firrtl.clock, in %en: !firrtl.uint<1>) {
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// expected-error @below {{EICG_wrapper instance cannot have annotations since it is an intrinsic}}
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firrtl.instance ckg sym @ckg {annotations = [{circt.nonlocal = @nla, class = "DummyA"}]} @EICG_wrapper(in in: !firrtl.clock, in test_en: !firrtl.uint<1>, in en: !firrtl.uint<1>, out out: !firrtl.clock)
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}
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}
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// -----
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firrtl.circuit "EICGWithModuleAnno" {
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// expected-error @below {{EICG_wrapper cannot have annotations since it is an intrinsic}}
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firrtl.extmodule @EICG_wrapper(in in: !firrtl.clock, in test_en: !firrtl.uint<1>, in en: !firrtl.uint<1>, out out: !firrtl.clock) attributes {defname = "EICG_wrapper", annotations = [{class = "DummyA"}]}
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firrtl.module @EICGWithModuleAnno(in %clock: !firrtl.clock, in %en: !firrtl.uint<1>) {
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firrtl.instance ckg @EICG_wrapper(in in: !firrtl.clock, in test_en: !firrtl.uint<1>, in en: !firrtl.uint<1>, out out: !firrtl.clock)
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}
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}
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