mirror of https://github.com/llvm/circt.git
37 lines
962 B
Plaintext
37 lines
962 B
Plaintext
; RUN: firtool -split-input-file -ir-fir %s -verify-diagnostics
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; Tests extracted from:
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; - test/scala/firrtlTests/transforms/DedupTests.scala
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FIRRTL version 4.0.0
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; "modules should not be deduped if the NoCircuitDedupAnnotation is supplied"
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;
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; CHECK-LABEL: firrtl.circuit "Top"
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; expected-error @below {{Unhandled annotation: {class = "firrtl.transforms.NoCircuitDedupAnnotation"}}}
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circuit Top: %[[
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{
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"class":"firrtl.transforms.NoCircuitDedupAnnotation"
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}
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]]
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; CHECK: firrtl.module @A(
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module A:
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input a: UInt<1>
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output b: UInt<1>
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connect b, a
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; CHECK: firrtl.module @A_(
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module A_:
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input a: UInt<1>
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output b: UInt<1>
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connect b, a
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; CHECK: firrtl.module @Top(
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public module Top:
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input a: UInt<1>
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output b: UInt<1>
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; CHECK-NEXT: firrtl.instance a1 @A(
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; CHECK-NEXT: firrtl.instance a2 @A_(
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inst a1 of A
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inst a2 of A_
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connect a1.a, a
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connect a2.a, a
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connect b, xor(a1.b, a2.b)
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