mirror of https://github.com/llvm/circt.git
384 lines
19 KiB
MLIR
384 lines
19 KiB
MLIR
// RUN: circt-opt -split-input-file -lower-hwarith-to-hw %s | FileCheck %s
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// CHECK: hw.module @constant(out out : i32) {
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// CHECK: %c0_i32 = hw.constant 0 : i32
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// CHECK: hw.output %c0_i32 : i32
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hw.module @constant(out out: i32) {
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%0 = hwarith.constant 0 : si32
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%out = hwarith.cast %0 : (si32) -> i32
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hw.output %out : i32
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}
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// -----
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// CHECK: hw.module @add(in %op0 : i32, in %op1 : i32, out sisi : i32, out siui : i32, out uisi : i32, out uiui : i32) {
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hw.module @add(in %op0 : i32, in %op1 : i32, out sisi : i32, out siui : i32, out uisi : i32, out uiui : i32) {
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%op0Signed = hwarith.cast %op0 : (i32) -> si32
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%op0Unsigned = hwarith.cast %op0 : (i32) -> ui32
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%op1Signed = hwarith.cast %op1 : (i32) -> si32
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%op1Unsigned = hwarith.cast %op1 : (i32) -> ui32
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP0]], %op0 : i1, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP1]], %op1 : i1, i32
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// CHECK: %[[SISI_RES:.*]] = comb.add %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%sisi = hwarith.add %op0Signed, %op1Signed : (si32, si32) -> si33
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP0]] : (i1) -> i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op0 : i2, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i2
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i2, i32
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// CHECK: %[[SIUI_RES:.*]] = comb.add %[[OP0_PADDED]], %[[OP1_PADDED]] : i34
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%siui = hwarith.add %op0Signed, %op1Unsigned : (si32, ui32) -> si34
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i2, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP1]] : (i1) -> i2
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op1 : i2, i32
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// CHECK: %[[UISI_RES:.*]] = comb.add %[[OP0_PADDED]], %[[OP1_PADDED]] : i34
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%uisi = hwarith.add %op0Unsigned, %op1Signed : (ui32, si32) -> si34
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i1, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i1, i32
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// CHECK: %[[UIUI_RES:.*]] = comb.add %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%uiui = hwarith.add %op0Unsigned, %op1Unsigned : (ui32, ui32) -> ui33
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// CHECK: %[[SISI_OUT:.*]] = comb.extract %[[SISI_RES]] from 0 : (i33) -> i32
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// CHECK: %[[SIUI_OUT:.*]] = comb.extract %[[SIUI_RES]] from 0 : (i34) -> i32
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// CHECK: %[[UISI_OUT:.*]] = comb.extract %[[UISI_RES]] from 0 : (i34) -> i32
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// CHECK: %[[UIUI_OUT:.*]] = comb.extract %[[UIUI_RES]] from 0 : (i33) -> i32
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%sisiOut = hwarith.cast %sisi : (si33) -> i32
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%siuiOut = hwarith.cast %siui : (si34) -> i32
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%uisiOut = hwarith.cast %uisi : (si34) -> i32
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%uiuiOut = hwarith.cast %uiui : (ui33) -> i32
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// CHECK: hw.output %[[SISI_OUT]], %[[SIUI_OUT]], %[[UISI_OUT]], %[[UIUI_OUT]] : i32, i32, i32, i32
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hw.output %sisiOut, %siuiOut, %uisiOut, %uiuiOut : i32, i32, i32, i32
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}
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// -----
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// CHECK: hw.module @sub(in %op0 : i32, in %op1 : i32, out sisi : i32, out siui : i32, out uisi : i32, out uiui : i32) {
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hw.module @sub(in %op0: i32, in %op1: i32, out sisi: i32, out siui: i32, out uisi: i32, out uiui: i32) {
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%op0Signed = hwarith.cast %op0 : (i32) -> si32
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%op0Unsigned = hwarith.cast %op0 : (i32) -> ui32
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%op1Signed = hwarith.cast %op1 : (i32) -> si32
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%op1Unsigned = hwarith.cast %op1 : (i32) -> ui32
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// CHECK: %[[SIGN_BIT_OP0_1:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP0_1]], %op0 : i1, i32
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// CHECK: %[[SIGN_BIT_OP1_1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP1_1]], %op1 : i1, i32
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// CHECK: %[[SISI_RES:.*]] = comb.sub %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%sisi = hwarith.sub %op0Signed, %op1Signed : (si32, si32) -> si33
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// CHECK: %[[SIGN_BIT_OP0_2:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP0]] : (i1) -> i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op0 : i2, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i2
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i2, i32
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// CHECK: %[[SIUI_RES:.*]] = comb.sub %[[OP0_PADDED]], %[[OP1_PADDED]] : i34
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%siui = hwarith.sub %op0Signed, %op1Unsigned : (si32, ui32) -> si34
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i2, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP1]] : (i1) -> i2
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op1 : i2, i32
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// CHECK: %[[UISI_RES:.*]] = comb.sub %[[OP0_PADDED]], %[[OP1_PADDED]] : i34
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%uisi = hwarith.sub %op0Unsigned, %op1Signed : (ui32, si32) -> si34
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i1, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i1, i32
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// CHECK: %[[UIUI_RES:.*]] = comb.sub %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%uiui = hwarith.sub %op0Unsigned, %op1Unsigned : (ui32, ui32) -> si33
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// CHECK: %[[SISI_OUT:.*]] = comb.extract %[[SISI_RES]] from 0 : (i33) -> i32
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%sisiOut = hwarith.cast %sisi : (si33) -> i32
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// CHECK: %[[SIUI_OUT:.*]] = comb.extract %[[SIUI_RES]] from 0 : (i34) -> i32
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%siuiOut = hwarith.cast %siui : (si34) -> i32
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// CHECK: %[[UISI_OUT:.*]] = comb.extract %[[UISI_RES]] from 0 : (i34) -> i32
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%uisiOut = hwarith.cast %uisi : (si34) -> i32
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// CHECK: %[[UIUI_OUT:.*]] = comb.extract %[[UIUI_RES]] from 0 : (i33) -> i32
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%uiuiOut = hwarith.cast %uiui : (si33) -> i32
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// CHECK: hw.output %[[SISI_OUT]], %[[SIUI_OUT]], %[[UISI_OUT]], %[[UIUI_OUT]] : i32, i32, i32, i32
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hw.output %sisiOut, %siuiOut, %uisiOut, %uiuiOut : i32, i32, i32, i32
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}
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// -----
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// CHECK: hw.module @mul(in %op0 : i32, in %op1 : i32, out sisi : i32, out siui : i32, out uisi : i32, out uiui : i32) {
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hw.module @mul(in %op0: i32, in %op1: i32, out sisi: i32, out siui: i32, out uisi: i32, out uiui: i32) {
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%op0Signed = hwarith.cast %op0 : (i32) -> si32
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%op0Unsigned = hwarith.cast %op0 : (i32) -> ui32
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%op1Signed = hwarith.cast %op1 : (i32) -> si32
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%op1Unsigned = hwarith.cast %op1 : (i32) -> ui32
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP0]] : (i1) -> i32
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op0 : i32, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP1]] : (i1) -> i32
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op1 : i32, i32
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// CHECK: %[[SISI_RES:.*]] = comb.mul %[[OP0_PADDED]], %[[OP1_PADDED]] : i64
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%sisi = hwarith.mul %op0Signed, %op1Signed : (si32, si32) -> si64
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP0]] : (i1) -> i32
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op0 : i32, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i32
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i32, i32
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// CHECK: %[[SIUI_RES:.*]] = comb.mul %[[OP0_PADDED]], %[[OP1_PADDED]] : i64
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%siui = hwarith.mul %op0Signed, %op1Unsigned : (si32, ui32) -> si64
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i32
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i32, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP1]] : (i1) -> i32
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op1 : i32, i32
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// CHECK: %[[UISI_RES:.*]] = comb.mul %[[OP0_PADDED]], %[[OP1_PADDED]] : i64
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%uisi = hwarith.mul %op0Unsigned, %op1Signed : (ui32, si32) -> si64
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i32
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i32, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i32
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i32, i32
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// CHECK: %[[UIUI_RES:.*]] = comb.mul %[[OP0_PADDED]], %[[OP1_PADDED]] : i64
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%uiui = hwarith.mul %op0Unsigned, %op1Unsigned : (ui32, ui32) -> ui64
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// CHECK: %[[SISI_OUT:.*]] = comb.extract %[[SISI_RES]] from 0 : (i64) -> i32
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%sisiOut = hwarith.cast %sisi : (si64) -> i32
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// CHECK: %[[SIUI_OUT:.*]] = comb.extract %[[SIUI_RES]] from 0 : (i64) -> i32
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%siuiOut = hwarith.cast %siui : (si64) -> i32
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// CHECK: %[[UISI_OUT:.*]] = comb.extract %[[UISI_RES]] from 0 : (i64) -> i32
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%uisiOut = hwarith.cast %uisi : (si64) -> i32
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// CHECK: %[[UIUI_OUT:.*]] = comb.extract %[[UIUI_RES]] from 0 : (i64) -> i32
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%uiuiOut = hwarith.cast %uiui : (ui64) -> i32
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// CHECK: hw.output %[[SISI_OUT]], %[[SIUI_OUT]], %[[UISI_OUT]], %[[UIUI_OUT]] : i32, i32, i32, i32
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hw.output %sisiOut, %siuiOut, %uisiOut, %uiuiOut : i32, i32, i32, i32
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}
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// -----
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// CHECK: hw.module @div(in %op0 : i32, in %op1 : i32, out sisi : i32, out siui : i32, out uisi : i32, out uiui : i32) {
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hw.module @div(in %op0: i32, in %op1: i32, out sisi: i32, out siui: i32, out uisi: i32, out uiui: i32) {
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%op0Signed = hwarith.cast %op0 : (i32) -> si32
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%op0Unsigned = hwarith.cast %op0 : (i32) -> ui32
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%op1Signed = hwarith.cast %op1 : (i32) -> si32
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%op1Unsigned = hwarith.cast %op1 : (i32) -> ui32
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP0]], %op0 : i1, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP1]], %op1 : i1, i32
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// CHECK: %[[SISI_RES:.*]] = comb.divs %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%sisi = hwarith.div %op0Signed, %op1Signed : (si32, si32) -> si33
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP0]], %op0 : i1, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i1, i32
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// CHECK: %[[SIUI_RES_IMM:.*]] = comb.divs %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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// CHECK: %[[SIUI_RES:.*]] = comb.extract %[[SIUI_RES_IMM]] from 0 : (i33) -> i32
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%siui = hwarith.div %op0Signed, %op1Unsigned : (si32, ui32) -> si32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i1, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP1]], %op1 : i1, i32
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// CHECK: %[[UISI_RES:.*]] = comb.divs %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%uisi = hwarith.div %op0Unsigned, %op1Signed : (ui32, si32) -> si33
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// CHECK: %[[UIUI_RES:.*]] = comb.divu %op0, %op1 : i32
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%uiui = hwarith.div %op0Unsigned, %op1Unsigned : (ui32, ui32) -> ui32
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// CHECK: %[[SISI_OUT:.*]] = comb.extract %[[SISI_RES]] from 0 : (i33) -> i32
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%sisiOut = hwarith.cast %sisi : (si33) -> i32
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%siuiOut = hwarith.cast %siui : (si32) -> i32
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// CHECK: %[[UISI_OUT:.*]] = comb.extract %[[UISI_RES]] from 0 : (i33) -> i32
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%uisiOut = hwarith.cast %uisi : (si33) -> i32
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%uiuiOut = hwarith.cast %uiui : (ui32) -> i32
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// CHECK: hw.output %[[SISI_OUT]], %[[SIUI_RES]], %[[UISI_OUT]], %[[UIUI_RES]] : i32, i32, i32, i32
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hw.output %sisiOut, %siuiOut, %uisiOut, %uiuiOut : i32, i32, i32, i32
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}
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// -----
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// CHECK: hw.module @icmp(in %op0 : i32, in %op1 : i32, out sisi : i1, out siui : i1, out uisi : i1, out uiui : i1) {
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hw.module @icmp(in %op0: i32, in %op1: i32, out sisi: i1, out siui: i1, out uisi: i1, out uiui: i1) {
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%op0Signed = hwarith.cast %op0 : (i32) -> si32
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%op0Unsigned = hwarith.cast %op0 : (i32) -> ui32
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%op1Signed = hwarith.cast %op1 : (i32) -> si32
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%op1Unsigned = hwarith.cast %op1 : (i32) -> ui32
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// CHECK: %[[SISI_OUT:.*]] = comb.icmp slt %op0, %op1 : i32
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%sisi = hwarith.icmp lt %op0Signed, %op1Signed : si32, si32
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 31 : (i32) -> i1
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP0]], %op0 : i1, i32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i1, i32
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// CHECK: %[[SIUI_OUT:.*]] = comb.icmp slt %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%siui = hwarith.icmp lt %op0Signed, %op1Unsigned : si32, ui32
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i1, i32
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// CHECK: %[[SIGN_BIT_OP1:.*]] = comb.extract %op1 from 31 : (i32) -> i1
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[SIGN_BIT_OP1]], %op1 : i1, i32
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// CHECK: %[[UISI_OUT:.*]] = comb.icmp slt %[[OP0_PADDED]], %[[OP1_PADDED]] : i33
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%uisi = hwarith.icmp lt %op0Unsigned, %op1Signed : ui32, si32
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// CHECK: %[[UIUI_OUT:.*]] = comb.icmp ult %op0, %op1 : i32
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%uiui = hwarith.icmp lt %op0Unsigned, %op1Unsigned : ui32, ui32
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// CHECK: hw.output %[[SISI_OUT]], %[[SIUI_OUT]], %[[UISI_OUT]], %[[UIUI_OUT]] : i1, i1, i1, i1
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hw.output %sisi, %siui, %uisi, %uiui: i1, i1, i1, i1
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}
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// -----
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// CHECK: hw.module @icmp_mixed_width(in %op0 : i5, in %op1 : i7, out sisi : i1, out siui : i1, out uisi : i1, out uiui : i1) {
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hw.module @icmp_mixed_width(in %op0: i5, in %op1: i7, out sisi: i1, out siui: i1, out uisi: i1, out uiui: i1) {
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%op0Signed = hwarith.cast %op0 : (i5) -> si5
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%op0Unsigned = hwarith.cast %op0 : (i5) -> ui5
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%op1Signed = hwarith.cast %op1 : (i7) -> si7
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%op1Unsigned = hwarith.cast %op1 : (i7) -> ui7
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 4 : (i5) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP0]] : (i1) -> i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op0 : i2, i5
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// CHECK: %[[SISI_OUT:.*]] = comb.icmp slt %[[OP0_PADDED]], %op1 : i7
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%sisi = hwarith.icmp lt %op0Signed, %op1Signed : si5, si7
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// CHECK: %[[SIGN_BIT_OP0:.*]] = comb.extract %op0 from 4 : (i5) -> i1
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// CHECK: %[[SIGN_EXTEND:.*]] = comb.replicate %[[SIGN_BIT_OP0]] : (i1) -> i3
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[SIGN_EXTEND]], %op0 : i3, i5
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant false
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// CHECK: %[[OP1_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op1 : i1, i7
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// CHECK: %[[SIUI_OUT:.*]] = comb.icmp slt %[[OP0_PADDED]], %[[OP1_PADDED]] : i8
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%siui = hwarith.icmp lt %op0Signed, %op1Unsigned : si5, ui7
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i2, i5
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// CHECK: %[[UISI_OUT:.*]] = comb.icmp slt %[[OP0_PADDED]], %op1 : i7
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%uisi = hwarith.icmp lt %op0Unsigned, %op1Signed : ui5, si7
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// CHECK: %[[ZERO_EXTEND:.*]] = hw.constant 0 : i2
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// CHECK: %[[OP0_PADDED:.*]] = comb.concat %[[ZERO_EXTEND]], %op0 : i2, i5
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// CHECK: %[[UIUI_OUT:.*]] = comb.icmp ult %[[OP0_PADDED]], %op1 : i7
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%uiui = hwarith.icmp lt %op0Unsigned, %op1Unsigned : ui5, ui7
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// CHECK: hw.output %[[SISI_OUT]], %[[SIUI_OUT]], %[[UISI_OUT]], %[[UIUI_OUT]] : i1, i1, i1, i1
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hw.output %sisi, %siui, %uisi, %uiui: i1, i1, i1, i1
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}
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// -----
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// Signature conversion and other-dialect operations using signedness values.
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// CHECK: hw.module @sigAndOps(in %a : i8, in %b : i8, in %cond : i1, in %clk : !seq.clock, out out : i8) {
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// CHECK-NEXT: %[[MUX_OUT:.*]] = comb.mux %cond, %a, %b : i8
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// CHECK-NEXT: %[[REG_OUT:.*]] = seq.compreg %[[MUX_OUT]], %clk : i8
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// CHECK-NEXT: hw.output %[[REG_OUT]] : i8
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// CHECK-NEXT: }
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hw.module @sigAndOps(in %a: ui8, in %b: ui8, in %cond: i1, in %clk : !seq.clock, out out: ui8) {
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%0 = comb.mux %cond, %a, %b : ui8
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%1 = seq.compreg %0, %clk: ui8
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hw.output %1 : ui8
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}
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// -----
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// Type conversions of struct and array ops.
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// CHECK: hw.module @structAndArrays(in %a : i8, in %b : i8, out out : !hw.struct<foo: !hw.array<2xi8>>) {
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// CHECK-NEXT: %[[ARRAY:.*]] = hw.array_create %a, %b : i8
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// CHECK-NEXT: %[[STRUCT:.*]] = hw.struct_create (%[[ARRAY]]) : !hw.struct<foo: !hw.array<2xi8>>
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// CHECK-NEXT: hw.output %[[STRUCT]] : !hw.struct<foo: !hw.array<2xi8>>
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// CHECK-NEXT: }
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hw.module @structAndArrays(in %a: ui8, in %b: ui8, out out: !hw.struct<foo: !hw.array<2xui8>>) {
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%2 = hw.array_create %a, %b : ui8
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%3 = hw.struct_create (%2) : !hw.struct<foo: !hw.array<2xui8>>
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hw.output %3 : !hw.struct<foo: !hw.array<2xui8>>
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}
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// -----
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// CHECK: hw.module.extern @externHWModule(in %a : i8, in %b : i8, out out : !hw.struct<foo: !hw.array<2xi8>>)
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hw.module.extern @externHWModule(in %a: ui8, in %b: ui8, out out: !hw.struct<foo: !hw.array<2xui8>>)
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// -----
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// CHECK-LABEL: hw.module @backedges() {
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// CHECK-NEXT: %[[VAL_0:.*]] = hw.constant false
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// CHECK-NEXT: %[[VAL_1:.*]] = comb.concat %[[VAL_0]], %[[VAL_2:.*]] : i1, i1
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// CHECK-NEXT: %[[VAL_3:.*]] = hw.constant false
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// CHECK-NEXT: %[[VAL_4:.*]] = comb.concat %[[VAL_3]], %[[VAL_2]] : i1, i1
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// CHECK-NEXT: %[[VAL_5:.*]] = comb.add %[[VAL_1]], %[[VAL_4]] : i2
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// CHECK-NEXT: %[[VAL_2]] = hw.constant true
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// CHECK-NEXT: hw.output
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// CHECK-NEXT: }
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hw.module @backedges() {
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%res = hwarith.add %arg, %arg : (ui1, ui1) -> ui2
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%arg = hwarith.constant 1 : ui1
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}
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// -----
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// CHECK-LABEL: hw.module @wires() {
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// CHECK: %[[VAL_0:.*]] = sv.wire : !hw.inout<i2>
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// CHECK: %[[VAL_1:.*]] = sv.reg : !hw.inout<i2>
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// CHECK: %[[VAL_2:.*]] = sv.read_inout %[[VAL_0]] : !hw.inout<i2>
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// CHECK: %[[VAL_3:.*]] = sv.read_inout %[[VAL_1]] : !hw.inout<i2>
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// CHECK: %[[VAL_4:.*]] = comb.icmp eq %[[VAL_3]], %[[VAL_2]] : i2
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// CHECK: %[[VAL_5:.*]] = hw.constant -2 : i2
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// CHECK: sv.assign %[[VAL_0]], %[[VAL_5]] : i2
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// CHECK: sv.assign %[[VAL_1]], %[[VAL_5]] : i2
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// CHECK: hw.output
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// CHECK: }
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hw.module @wires () {
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%r52 = sv.wire : !hw.inout<ui2>
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%r53 = sv.reg : !hw.inout<ui2>
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%0 = sv.read_inout %r52 : !hw.inout<ui2>
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%1 = sv.read_inout %r53 : !hw.inout<ui2>
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%33 = hwarith.cast %0 : (ui2) -> i2
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%34 = hwarith.cast %1 : (ui2) -> i2
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|
%35 = comb.icmp eq %34, %33 : i2
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|
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|
%c0_ui2 = hwarith.constant 2 : ui2
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|
sv.assign %r52, %c0_ui2 : ui2
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|
sv.assign %r53, %c0_ui2 : ui2
|
|
}
|
|
|
|
// -----
|
|
|
|
// CHECK: hw.type_scope @pycde {
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|
// CHECK: hw.typedecl @MMIOIntermediateCmd : !hw.struct<offset: i32>
|
|
// CHECK: }
|
|
// CHECK: hw.module @MMIOAxiReadWriteMux(out cmd : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: i32>>) {
|
|
// CHECK: %c0_i32 = hw.constant 0 : i32
|
|
// CHECK: [[R0:%.+]] = hw.struct_create (%c0_i32) : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: i32>>
|
|
// CHECK: hw.output [[R0]] : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: i32>>
|
|
// CHECK: }
|
|
|
|
hw.type_scope @pycde {
|
|
hw.typedecl @MMIOIntermediateCmd : !hw.struct<offset: ui32>
|
|
}
|
|
hw.module @MMIOAxiReadWriteMux(out cmd : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: ui32>>) {
|
|
%2 = hw.constant 0 : i32
|
|
%3 = hwarith.cast %2 : (i32) -> ui32
|
|
%4 = hw.struct_create (%3) : !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: ui32>>
|
|
hw.output %4: !hw.typealias<@pycde::@MMIOIntermediateCmd, !hw.struct<offset: ui32>>
|
|
}
|