..
AsmParser
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
InstPrinter
R600/SI: Change mubuf offsets to print as decimal
2014-12-03 03:12:13 +00:00
MCTargetDesc
R600/SI: Restore PrivateGlobalPrefix to the default ELF value of ".L"
2014-12-06 05:34:34 +00:00
TargetInfo
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AMDGPU.h
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
AMDGPU.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUAlwaysInlinePass.cpp
Reapply: R600: Make sure to inline all internal functions
2014-11-03 19:49:05 +00:00
AMDGPUAsmPrinter.cpp
Silencing a 32-bit implicit conversion warning in MSVC; NFC.
2014-12-03 14:39:58 +00:00
AMDGPUAsmPrinter.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
AMDGPUCallingConv.td
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUISelDAGToDAG.cpp
R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime
2014-12-02 17:05:41 +00:00
AMDGPUISelLowering.cpp
R600/SI: Update instruction conversions for VI
2014-12-07 12:19:03 +00:00
AMDGPUISelLowering.h
R600: Factor i64 UDIVREM lowering into its own fuction
2014-11-15 01:07:53 +00:00
AMDGPUInstrInfo.cpp
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
R600/SI: Combine min3/max3 instructions
2014-11-14 20:08:52 +00:00
AMDGPUInstructions.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUMCInstLower.cpp
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUMCInstLower.h
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUPromoteAlloca.cpp
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AMDGPURegisterInfo.cpp
R600/SI: Enable inline assembly
2014-12-03 04:08:00 +00:00
AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
AMDGPUSubtarget.h
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUTargetMachine.cpp
R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()
2014-12-03 18:27:08 +00:00
AMDGPUTargetMachine.h
This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
2014-11-13 09:26:31 +00:00
AMDGPUTargetTransformInfo.cpp
Fix broken doxygen annotations, NFC
2014-11-12 18:25:06 +00:00
AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
CIInstructions.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
CMakeLists.txt
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
CaymanInstructions.td
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EvergreenInstructions.td
R600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs
2014-11-02 23:46:54 +00:00
LLVMBuild.txt
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Makefile
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Processors.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600ISelLowering.cpp
R600/SI: Use ZeroOrNegativeOneBooleanContent
2014-11-26 21:23:15 +00:00
R600ISelLowering.h
…
R600InstrFormats.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
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R600InstrInfo.h
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R600Instructions.td
Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.
2014-11-26 00:46:26 +00:00
R600Intrinsics.td
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
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R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDefines.h
R600/SI: Move more information into SIProgramInfo struct
2014-12-02 21:28:53 +00:00
SIFixSGPRCopies.cpp
R600/SI: Fix SIFixSGPRCopies for copies to physical registers
2014-12-03 05:22:39 +00:00
SIFixSGPRLiveRanges.cpp
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SIFoldOperands.cpp
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
SIISelLowering.cpp
R600/SI: Set correct number of user sgprs for HSA runtime
2014-12-02 17:41:43 +00:00
SIISelLowering.h
R600/SI: Combine min3/max3 instructions
2014-11-14 20:08:52 +00:00
SIInsertWaits.cpp
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SIInstrFormats.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
SIInstrInfo.cpp
R600/SI: Update instruction conversions for VI
2014-12-07 12:19:03 +00:00
SIInstrInfo.h
R600/SI: Update instruction conversions for VI
2014-12-07 12:19:03 +00:00
SIInstrInfo.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
SIInstructions.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
SIIntrinsics.td
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SILoadStoreOptimizer.cpp
R600/SI: Fix live range error hidden by SIFoldOperands
2014-12-03 05:22:29 +00:00
SILowerControlFlow.cpp
Removing a variable that is initialized but never read. The original author has been alerted to the warning, in case this variable is meant to be used. Fixes -Werror builds in the meantime.
2014-11-24 14:03:16 +00:00
SILowerI1Copies.cpp
R600/SI: Remove i1 pseudo VALU ops
2014-12-03 05:22:35 +00:00
SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
R600/SI: Fix allocating flat_scr_lo / flat_scr_hi
2014-11-25 07:53:06 +00:00
SIRegisterInfo.h
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SIRegisterInfo.td
R600/SI: Fix assembly names for exec_hi and exec_lo
2014-11-14 14:08:04 +00:00
SISchedule.td
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SIShrinkInstructions.cpp
R600/SI: Use s_movk_i32
2014-11-13 20:44:23 +00:00
SITypeRewriter.cpp
Revert "IR: MDNode => Value"
2014-11-11 21:30:22 +00:00
VIInstrFormats.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
VIInstructions.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
