hanchenye-llvm-project/llvm/test/CodeGen/Thumb2
Francis Visoiu Mistrih c71cced0aa [CodeGen] Always use `printReg` to print registers in both MIR and debug
output

As part of the unification of the debug format and the MIR format,
always use `printReg` to print all kinds of registers.

Updated the tests using '_' instead of '%noreg' until we decide which
one we want to be the default one.

Differential Revision: https://reviews.llvm.org/D40421

llvm-svn: 319445
2017-11-30 16:12:24 +00:00
..
2009-07-17-CrossRegClassCopy.ll
2009-07-21-ISelBug.ll
2009-07-23-CPIslandBug.ll
2009-07-30-PEICrash.ll
2009-08-01-WrongLDRBOpc.ll
2009-08-02-CoalescerBug.ll
2009-08-04-CoalescerAssert.ll
2009-08-04-CoalescerBug.ll
2009-08-04-ScavengerAssert.ll
2009-08-04-SubregLoweringBug.ll
2009-08-04-SubregLoweringBug2.ll
2009-08-04-SubregLoweringBug3.ll
2009-08-06-SpDecBug.ll
2009-08-07-CoalescerBug.ll
2009-08-07-NeonFPBug.ll
2009-08-08-ScavengerAssert.ll
2009-08-10-ISelBug.ll
2009-08-21-PostRAKill4.ll
2009-09-01-PostRAProlog.ll
2009-10-15-ITBlockBranch.ll
2009-11-01-CopyReg2RegBug.ll
2009-11-11-ScavengerAssert.ll
2009-11-13-STRDBug.ll
2009-12-01-LoopIVUsers.ll
2010-01-06-TailDuplicateLabels.ll
2010-01-19-RemovePredicates.ll
2010-02-11-phi-cycle.ll
2010-02-24-BigStack.ll
2010-03-08-addi12-ccout.ll
2010-03-15-AsmCCClobber.ll
2010-04-15-DynAllocBug.ll
2010-04-26-CopyRegCrash.ll
2010-05-24-rsbs.ll
2010-06-14-NEONCoalescer.ll
2010-06-19-ITBlockCrash.ll
2010-06-21-TailMergeBug.ll
2010-08-10-VarSizedAllocaBug.ll
2010-11-22-EpilogueBug.ll [ARM] Call setBooleanContents(ZeroOrOneBooleanContent) 2017-08-22 11:02:37 +00:00
2010-12-03-AddSPNarrowing.ll
2011-04-21-FILoweringBug.ll
2011-06-07-TwoAddrEarlyClobber.ll
2011-12-16-T2SizeReduceAssert.ll
2012-01-13-CBNZBug.ll
2013-02-19-tail-call-register-hint.ll
2013-03-02-vduplane-nonconstant-source-index.ll
2013-03-06-vector-sext-operand-scalarize.ll
aapcs.ll
aligned-constants.ll
aligned-spill.ll
bfi.ll
bfx.ll
bicbfi.ll [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
buildvector-crash.ll
carry.ll
cbnz.ll
constant-islands-jump-table.ll
constant-islands-new-island-padding.ll
constant-islands-new-island.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
constant-islands.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
cortex-fp.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
crash.ll
cross-rc-coalescing-1.ll
cross-rc-coalescing-2.ll
div.ll
emit-unwinding.ll
float-cmp.ll
float-intrinsics-double.ll
float-intrinsics-float.ll
float-ops.ll
frame-pointer.ll
frameless.ll
frameless2.ll
ifcvt-compare.ll
ifcvt-neon-deprecated.mir [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
ifcvt-no-branch-predictor.ll [ARM] Adjust ifcvt heuristic for the diamond ifcvt case 2017-07-12 13:23:10 +00:00
ifcvt-rescan-bug-2016-08-22.ll
ifcvt-rescan-diamonds.ll
inflate-regs.ll
inlineasm.ll
intrinsics-cc.ll [ARM] Honor -mfloat-abi for libcall calling convention 2017-10-26 21:42:32 +00:00
intrinsics-coprocessor.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
large-call.ll
large-stack.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
ldr-str-imm12.ll Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
lit.local.cfg
longMACt.ll
lsr-deficiency.ll
machine-licm.ll
mul_const.ll
pic-load.ll
segmented-stacks.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
setjmp_longjmp.ll
stack_guard_remat.ll
tail-call-r9.ll
tbb-removeadd.mir [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
thumb2-adc.ll
thumb2-add.ll
thumb2-add2.ll
thumb2-add3.ll
thumb2-add4.ll
thumb2-add5.ll
thumb2-add6.ll
thumb2-and.ll
thumb2-and2.ll
thumb2-asr.ll
thumb2-asr2.ll
thumb2-bcc.ll
thumb2-bfc.ll
thumb2-bic.ll
thumb2-branch.ll
thumb2-call-tc.ll
thumb2-call.ll
thumb2-cbnz.ll
thumb2-clz.ll
thumb2-cmn.ll
thumb2-cmn2.ll
thumb2-cmp.ll
thumb2-cpsr-liveness.ll
thumb2-eor.ll
thumb2-eor2.ll
thumb2-ifcvt1-tc.ll
thumb2-ifcvt1.ll
thumb2-ifcvt2.ll [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). 2017-06-28 07:07:03 +00:00
thumb2-ifcvt3.ll
thumb2-jtb.ll
thumb2-ldm.ll
thumb2-ldr.ll
thumb2-ldr_ext.ll
thumb2-ldr_post.ll
thumb2-ldr_pre.ll
thumb2-ldrb.ll
thumb2-ldrd.ll
thumb2-ldrh.ll
thumb2-lsl.ll
thumb2-lsl2.ll
thumb2-lsr.ll
thumb2-lsr2.ll
thumb2-lsr3.ll
thumb2-mla.ll
thumb2-mls.ll
thumb2-mov.ll
thumb2-mul.ll
thumb2-mulhi.ll
thumb2-mvn.ll
thumb2-mvn2.ll
thumb2-neg.ll
thumb2-orn.ll
thumb2-orn2.ll
thumb2-orr.ll
thumb2-orr2.ll
thumb2-pack.ll
thumb2-rev.ll
thumb2-rev16.ll ARM: Do not use llc -march in tests. 2017-08-01 22:20:49 +00:00
thumb2-ror.ll
thumb2-rsb.ll
thumb2-rsb2.ll
thumb2-sbc.ll
thumb2-select.ll
thumb2-select_xform.ll
thumb2-shifter.ll
thumb2-smla.ll
thumb2-smul.ll
thumb2-spill-q.ll
thumb2-str.ll
thumb2-str_post.ll
thumb2-str_pre.ll
thumb2-strb.ll
thumb2-strh.ll
thumb2-sub.ll
thumb2-sub2.ll
thumb2-sub3.ll
thumb2-sub4.ll
thumb2-sub5.ll
thumb2-sxt-uxt.ll
thumb2-sxt_rot.ll
thumb2-tbb.ll
thumb2-tbh.ll
thumb2-teq.ll
thumb2-teq2.ll
thumb2-tst.ll
thumb2-tst2.ll
thumb2-uxt_rot.ll
thumb2-uxtb.ll
tls1.ll
tls2.ll
tpsoft.ll
v8_IT_1.ll
v8_IT_2.ll
v8_IT_3.ll [arm] Fix Unnecessary reloads from GOT. 2017-11-13 20:45:38 +00:00
v8_IT_4.ll
v8_IT_5.ll [Dominators] Include infinite loops in PostDominatorTree 2017-08-15 18:14:57 +00:00
v8_IT_6.ll