hanchenye-llvm-project/llvm/test/CodeGen
Pablo Barrio 2b4385846c Fix function pointer tail calls in armv8-M.base
Summary:
The compiler fails with the following error message:

fatal error: error in backend: ran out of registers during
register allocation

Tail call optimization for Armv8-M.base fails to meet all the required
constraints when handling calls to function pointers where the
arguments take up r0-r3. This is because the pointer to the
function to be called can only be stored in r0-r3, but these are
all occupied by arguments. This patch makes sure that tail call
optimization does not try to handle this type of calls.

Reviewers: chill, MatzeB, olista01, rengolin, efriedma

Reviewed By: olista01, efriedma

Subscribers: efriedma, aemerson, javed.absar, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D40706

llvm-svn: 319664
2017-12-04 16:55:49 +00:00
..
AArch64 [AArch64] Allow using emulated tls on platforms other than ELF 2017-12-04 09:09:04 +00:00
AMDGPU [AMDGPU] SDWA: add support for PRESERVE into SDWA peephole. 2017-12-04 16:22:32 +00:00
ARC
ARM Fix function pointer tail calls in armv8-M.base 2017-12-04 16:55:49 +00:00
AVR [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output 2017-11-30 12:12:19 +00:00
BPF [CodeGen] Print register names in lowercase in both MIR and debug output 2017-11-28 17:15:09 +00:00
Generic Support generic lowering of vector bswap 2017-11-30 11:06:22 +00:00
Hexagon [Hexagon] Fix wrong check in test/CodeGen/Hexagon/newvaluejump-solo.mir 2017-11-30 21:23:19 +00:00
Inputs
Lanai [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output 2017-11-30 12:12:19 +00:00
MIR [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
MSP430
Mips [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
NVPTX [NVPTX] Assign valid global names 2017-12-04 14:19:33 +00:00
Nios2
PowerPC Follow-up to r319434 to turn the pass on by default 2017-12-01 12:02:59 +00:00
RISCV [RISCV] Use register X0 (ZERO) for constant 0 2017-11-21 08:23:08 +00:00
SPARC [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
SystemZ [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
Thumb [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
Thumb2 [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
WebAssembly [WebAssembly] Revert r319186 "Support bitcasted function addresses with varargs." 2017-11-30 18:16:49 +00:00
WinEH Make x86 __ehhandler comdat if parent function is 2017-10-20 17:04:43 +00:00
X86 [X86] Allow VPMAXUQ/VPMAXSQ/VPMINUQ/VPMINSQ to be used with 128/256 bit vectors when AVX512 is enabled. 2017-12-04 07:21:01 +00:00
XCore