55571bd7bd
Extract subprogram and compile unit information from the debug info attached to an instruction.
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llvm-svn: 83491
2009-10-07 22:04:08 +00:00
50820a2677
Add some instruction encoding bits for NEON load/store instructions.
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llvm-svn: 83490
2009-10-07 21:53:04 +00:00
5b741f3d14
80-column and whitespace fixes.
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llvm-svn: 83489
2009-10-07 21:14:25 +00:00
818b6b96cb
Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" so
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that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16
llvm-svn: 83488
2009-10-07 20:57:20 +00:00
70f004d9e6
Convert test to FileCheck.
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llvm-svn: 83487
2009-10-07 20:51:42 +00:00
e7ef4a9a6b
Add codegen support for NEON vst4 intrinsics with 128-bit vectors.
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llvm-svn: 83486
2009-10-07 20:49:18 +00:00
3ee21f1b91
Fixes problem in finding visible convertion functions of a class
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where matching conversion types in base classes were still visible.
Plus refactoring and cleanup.
Added a test case.
llvm-svn: 83485
2009-10-07 20:43:36 +00:00
23464866ad
Add codegen support for NEON vst3 intrinsics with 128-bit vectors.
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llvm-svn: 83484
2009-10-07 20:30:08 +00:00
63849cbd32
grammar
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llvm-svn: 83483
2009-10-07 19:08:36 +00:00
3dcb5377ef
Add codegen support for NEON vst2 intrinsics with 128-bit vectors.
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llvm-svn: 83482
2009-10-07 18:47:39 +00:00
2af2253e49
add initializers for clarity. Add missing assignment of PrevLastUseOp.
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llvm-svn: 83481
2009-10-07 18:44:24 +00:00
de1cb40eb4
Remove LazyLiveness from the tree. It doesn't work right now, and I'm not going to have the time
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to finish it any time soon. If someone's interested it, they can resurrect it from SVN history.
llvm-svn: 83480
2009-10-07 18:40:17 +00:00
ab3a9474d6
Add codegen support for NEON vld4 intrinsics with 128-bit vectors.
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llvm-svn: 83479
2009-10-07 18:09:32 +00:00
2207e5fc7b
Add another bit of the ARM target assembler to llvm-mc to parse registers
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with writeback, things like "sp!", etc. Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.
llvm-svn: 83477
2009-10-07 18:01:35 +00:00
9b60992120
Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and
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teach it how to recognize invariant physical registers.
llvm-svn: 83476
2009-10-07 17:47:20 +00:00
be8137b0b4
Replace TargetInstrInfo::isInvariantLoad and its target-specific
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implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.
llvm-svn: 83475
2009-10-07 17:38:06 +00:00
db9493ce68
Add a few simple MachineVerifier checks for MachineMemOperands.
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llvm-svn: 83474
2009-10-07 17:36:00 +00:00
40fb74484e
Diagnose explicit instantiations and specializations that occur in class scope
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llvm-svn: 83473
2009-10-07 17:30:37 +00:00
ae01f78a31
When building candidate set for built-ins; when looking for
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convesion functions, look in base classes to.
(Removes a FIXME).
llvm-svn: 83472
2009-10-07 17:26:09 +00:00
6bbefc2f67
Add codegen support for NEON vld3 intrinsics with 128-bit vectors.
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llvm-svn: 83471
2009-10-07 17:24:55 +00:00
99e80228a9
Rearrange code for selecting vld2 intrinsics. No functionality change.
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This is just to be more consistent with the forthcoming code for vld3/4.
llvm-svn: 83470
2009-10-07 17:23:09 +00:00
e4b05168f6
Class template partial specializations can be declared anywhere that
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its definition may be defined, including in a class.
Also, put in an assertion when trying to instantiate a class template
partial specialization of a member template, which is not yet
implemented.
llvm-svn: 83469
2009-10-07 17:21:34 +00:00
aa47a8d71a
Add tests for vld2 of 128-bit vectors.
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llvm-svn: 83468
2009-10-07 17:19:13 +00:00
fa14dd430c
Add register-reuse to frame-index register scavenging. When a target uses
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a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
2009-10-07 17:12:56 +00:00
12df37c5d7
Removed couple of unnecessary canonicalization
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per Doug's obsevation.
llvm-svn: 83464
2009-10-07 16:56:50 +00:00
bcdb02587e
Do not assume that the module is set.
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llvm-svn: 83462
2009-10-07 16:37:55 +00:00
822f634d29
Add a comment explaining how DenseMap::insert works, because it is not
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intuitive.
It does NOT update the value if the key is already in the map,
it also returns false if the key is already in the map, regardless
if the value matched.
llvm-svn: 83458
2009-10-07 09:23:56 +00:00
a4560bad97
Add PR to this FIXME, looks like I didn't commit this change after all.
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llvm-svn: 83457
2009-10-07 09:22:55 +00:00
986742a14f
Make getPointerTo return a const PointerType* rather than
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an unqualified PointerType* because it seems more correct.
llvm-svn: 83454
2009-10-07 07:35:19 +00:00
8c6066d021
Add 'template' keyword to disambiguate the use of a member template within a templated class. Hopefully this will please the buildbots.
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llvm-svn: 83452
2009-10-07 06:20:14 +00:00
7881ac97a5
Revert r83443.
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llvm-svn: 83451
2009-10-07 03:21:11 +00:00
2a685bdbee
INTRINSIC_W_CHAIN and INTRINSIC_VOID do not use MemSDNode. They
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may access memory, but they don't carry a MachineMemOperand.
llvm-svn: 83449
2009-10-07 03:00:18 +00:00
1e39bd944b
Mangle anonymous structs/unions correctly. Fixes PR5139.
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llvm-svn: 83448
2009-10-07 01:45:02 +00:00
db9fca7735
Fixup pathnames.
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llvm-svn: 83443
2009-10-07 01:11:54 +00:00
ff971e8bf4
Add a MangleContext and pass it to all mangle functions. It will be used for keeping state, such as identifiers assigned to anonymous structs as well as scope encoding.
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llvm-svn: 83442
2009-10-07 01:06:45 +00:00
e666bc9f64
Add FreeInst to the "is a call" check for Insts that are calls, but
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not intrinsics.
llvm-svn: 83441
2009-10-07 00:54:08 +00:00
fbe6d079e2
More testing of explicit specializations
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llvm-svn: 83440
2009-10-07 00:45:53 +00:00
c3661decc3
Change ExplodedNode to have its NodeGroups all BumpPtrAllocated, avoiding malloc() traffic when adding successors/predecessors to a node. This was done by introducing BumpVector, which is essentially SmallVector with all memory being BumpPtrAllocated (this can certainly be cleaned up or moved into llvm/ADT).
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This change yields a 1.8% speed increase when running the analyzer (with -analyzer-store=region) on a small benchmark file.
llvm-svn: 83439
2009-10-07 00:42:52 +00:00
3ea4ab8e79
Force a specific target triple in c-index-api-test.m, making the behavior of the test not be dependent on the host.
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llvm-svn: 83438
2009-10-07 00:39:48 +00:00
f8e4410994
Fix this comment. The loop header is the loop entry point.
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llvm-svn: 83437
2009-10-07 00:33:10 +00:00
548886518d
Refactor checking of the scope of explicit template specialization
...
declarations and explicit template instantiations, improving
diagnostics and making the code usable for function template
specializations (as well as class template specializations and partial
specializations).
llvm-svn: 83436
2009-10-07 00:13:32 +00:00
75b59fb055
Add PseudoSourceValues for constpool stuff on ELF (Darwin should use something similar)
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and register spills.
llvm-svn: 83435
2009-10-07 00:06:35 +00:00
6ba26317ce
While we still have a MallocInst treat it as a call like any other
...
for inlining.
When MallocInst goes away this code will be subsumed as part of
calls and work just fine...
llvm-svn: 83434
2009-10-07 00:02:18 +00:00
512c5b770f
Fix eof.
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llvm-svn: 83433
2009-10-06 23:38:59 +00:00
4992f59699
Fix eof.
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llvm-svn: 83432
2009-10-06 23:38:31 +00:00
34d93dcddd
Patch to implement C++ [over.built]p11 of overload resolution.
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Doug, please review. There is a FIXME in the test case with a question
which is unrelated to this patch (that is, error is issued
before set of builtins are added to the candidate list).
llvm-svn: 83429
2009-10-06 23:08:05 +00:00
b703fd2216
Uncomment some commented out code.
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llvm-svn: 83428
2009-10-06 23:02:00 +00:00
da6822f584
Add codegen for __builtin_abort. Convert to FileCheck.
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llvm-svn: 83427
2009-10-06 22:58:45 +00:00
c6d171ec77
Change GetAddressCXXOfBaseClass to use CXXBasePaths for calculating base class offsets. Fix the code to handle virtual bases as well.
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llvm-svn: 83426
2009-10-06 22:43:30 +00:00
febe39b488
Added bits of the ARM target assembler to llvm-mc to parse some load instruction
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operands. Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts. This is a work in progress.
llvm-svn: 83424
2009-10-06 22:26:42 +00:00
Devang Patel