cee887425e
Make g5 target explicit; scheduling affects register choice.
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llvm-svn: 96413
2010-02-16 23:25:23 +00:00
e2347aac52
complex patterns don't get 'record' nodes, they implicitly
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record all their results.
llvm-svn: 96412
2010-02-16 23:16:25 +00:00
e83e2483bd
clean up some code, eliminate NodeIsComplexPattern, which
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does the same thing as getComplexPatternInfo.
llvm-svn: 96411
2010-02-16 23:13:59 +00:00
85e5081c77
Make error statement more personal.
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llvm-svn: 96410
2010-02-16 22:47:14 +00:00
314e34b5b8
fix indentation
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llvm-svn: 96409
2010-02-16 22:38:31 +00:00
afac7dad21
fix rdar://7653908, a crash on a case where we would fold a load
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into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
llvm-svn: 96408
2010-02-16 22:35:06 +00:00
0062f7bf59
Adjust register numbers in tests to compensate for the
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new lack of R2.
llvm-svn: 96407
2010-02-16 22:31:31 +00:00
c98beb567c
filecheckize
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llvm-svn: 96404
2010-02-16 22:13:43 +00:00
37f106e18c
Handle tGPR register class in a few more places. This fixes some llvm-gcc
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build failures due to my fix for pr6111.
llvm-svn: 96402
2010-02-16 22:01:59 +00:00
4c444bf606
Add SMC (Secure Monitor Call) system instruction for disassembly only.
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llvm-svn: 96401
2010-02-16 21:59:54 +00:00
1b967bf0e4
Really reserve R2 on PPC Darwin. PR 6314.
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llvm-svn: 96399
2010-02-16 21:53:27 +00:00
7c7cfbbc38
Use line and column number to distinguish two lexical blocks at the same level.
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llvm-svn: 96395
2010-02-16 21:39:34 +00:00
3e2cad3b1a
80 column cleanup
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llvm-svn: 96393
2010-02-16 21:23:02 +00:00
8b9fec4428
New testcase.
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llvm-svn: 96391
2010-02-16 21:16:08 +00:00
82b04130cb
Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
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If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
llvm-svn: 96389
2010-02-16 21:09:44 +00:00
fba7fce5be
Remove trailing whitespace
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llvm-svn: 96388
2010-02-16 21:07:46 +00:00
aff96b2132
Rename SuccessorNumber to GetSuccessorNumber.
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llvm-svn: 96387
2010-02-16 21:06:42 +00:00
9641d06809
Add support for emitting non-temporal stores for DAGs marked
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non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
llvm-svn: 96386
2010-02-16 20:50:18 +00:00
6bfacb7393
Testcase for critical edge splitting with load PRE.
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llvm-svn: 96385
2010-02-16 20:48:55 +00:00
2284ddab56
Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but
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to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.
llvm-svn: 96384
2010-02-16 20:42:29 +00:00
756ab53e60
Remove redundant setting of Defs. CPSR is already marked by the block level set of Defs.
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llvm-svn: 96383
2010-02-16 20:35:59 +00:00
6deab96c81
Refactor rewriting for PHI nodes into a separate function.
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llvm-svn: 96382
2010-02-16 20:25:07 +00:00
0a334d0df9
First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates.
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They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.
This patch handles ARM mode. Thumb2 will follow.
llvm-svn: 96381
2010-02-16 20:17:57 +00:00
46c39d4f1f
Added for disassembly the following instructions:
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o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)
llvm-svn: 96380
2010-02-16 20:04:27 +00:00
92cdb6eec5
Split critical edges as needed for load PRE.
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llvm-svn: 96378
2010-02-16 19:51:59 +00:00
3de492ec35
Refactor to share code to find the position of a basic block successor in the
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terminator's list of successors.
llvm-svn: 96377
2010-02-16 19:49:17 +00:00
0849ed5e26
Fix whitespace.
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llvm-svn: 96372
2010-02-16 19:42:34 +00:00
10e3022b10
Function attributes have index ~0, not 0
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llvm-svn: 96370
2010-02-16 19:28:02 +00:00
6c132331ee
simplify this code. In the new world order there is no
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need to scan the entire subtree of the pattern anymore.
llvm-svn: 96369
2010-02-16 19:19:58 +00:00
f8695c1ee9
convert the new matcher to check intermediate nodes for a single
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use and only call IsProfitableToFold/IsLegalToFold on the load
being folded, like the old dagiselemitter does. This
substantially simplifies the code and improves opportunities for
sharing.
llvm-svn: 96368
2010-02-16 19:15:55 +00:00
300048631b
change dag isel emitter to only call 'IsProfitableToFold' on nodes
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with chains. On interior nodes that lead up to them, we just directly
check that there is a single use. This generates slightly more
efficient code.
llvm-svn: 96366
2010-02-16 19:03:34 +00:00
70aa8d0745
Fix pr6111: Avoid using the LR register for the target address of an indirect
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branch in ARM v4 code, since it gets clobbered by the return address before
it is used. Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.
llvm-svn: 96360
2010-02-16 17:24:15 +00:00
cbd43f89ac
Introduce isOpaqueTy and use it rather than isa<OpaqueType>. Also, move some
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methods to try to have the type predicates be more logically positioned.
llvm-svn: 96349
2010-02-16 14:50:09 +00:00
19d0b47b1f
There are two ways of checking for a given type, for example isa<PointerType>(T)
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and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
llvm-svn: 96344
2010-02-16 11:11:14 +00:00
d7d8afabd0
Minor warning fixes (semicolons, newline at EOF).
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llvm-svn: 96343
2010-02-16 10:25:04 +00:00
52bfe24e2c
mark all the generated node predicates 'const'.
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llvm-svn: 96337
2010-02-16 07:26:36 +00:00
5ce8303950
generate code for node and pattern predicates. Note that this won't
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build if enabled, it will fail with constness issues. I'll resolve
these next.
llvm-svn: 96336
2010-02-16 07:21:10 +00:00
1d689a09a9
refactor some code into a local class.
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llvm-svn: 96334
2010-02-16 06:52:01 +00:00
812586ad2a
remove now dead code and fixme.
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llvm-svn: 96333
2010-02-16 06:15:00 +00:00
f400fd6aec
remove dead code. This is never generated for any targets in mainline.
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llvm-svn: 96332
2010-02-16 06:14:22 +00:00
aa7d3e096b
add support for the new isel matcher to generate
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(isprofitable|islegal)tofold checks.
llvm-svn: 96331
2010-02-16 06:10:58 +00:00
4964ef88c2
make pcrel immediate values relative to the start of the field,
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not the end of the field, fixing rdar://7651978
llvm-svn: 96330
2010-02-16 05:03:17 +00:00
5bf1a325dc
Fix a typo in an LLVMOpcode enum. LLVMTrunk -> LLVMTrunc.
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llvm-svn: 96324
2010-02-16 03:45:23 +00:00
3b391a6dfa
Fix some ocaml documentation
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llvm-svn: 96323
2010-02-16 03:45:17 +00:00
adcee844ea
The code section for an ISR has a specific address.
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Currently, whether a function is ISR or not is encoded in the section attribute for that function.
llvm-svn: 96322
2010-02-16 03:41:07 +00:00
d7eb693643
Handle DBG_VALUE mixed with labels when doing PHI
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elimination. Before a DBG_VALUE could affect codegen.
The solution here is imperfect and not final.
llvm-svn: 96318
2010-02-16 01:57:28 +00:00
af25cf825c
Drop support for the InReg attribute on the ppc backend. This was used by
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llvm-gcc but has been replaced with pad argument which don't need any
special backend support.
llvm-svn: 96312
2010-02-16 01:50:18 +00:00
521efe68ab
Split the main for-each-use loop again, this time for GenerateTruncates,
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as it also peeks at which registers are being used by other uses. This
makes LSR less sensitive to use-list order.
llvm-svn: 96308
2010-02-16 01:42:53 +00:00
d37e7b5bc5
Reapply 96294; now that I've gotten around to looking
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at older buildbot messages, I see the failure predates
this patch.
llvm-svn: 96307
2010-02-16 01:27:47 +00:00
1776295bf1
Apply patch from http://llvm.org/bugs/attachment.cgi?id=4136 now that PR5004 is
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finished.
llvm-svn: 96304
2010-02-16 00:58:02 +00:00
Dale Johannesen