a864a67185
Use more sensible type for flags in asms. PR 5570.
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Patch by Sylve`re Teissier (sorry, ASCII only).
llvm-svn: 91988
2009-12-23 07:32:51 +00:00
ef3fdc1cbd
Add testcase for PR5703
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llvm-svn: 91931
2009-12-22 22:37:23 +00:00
e27e028cdd
Lower setcc branchless, if this is profitable.
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Based on the patch by Brian Lucas!
llvm-svn: 91175
2009-12-11 23:01:29 +00:00
dd2b2f8cba
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
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llvm-svn: 90819
2009-12-08 01:03:04 +00:00
b56334b4f2
While this test is testing a problem in the generic part of codegen,
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the problem only shows for msp430 and pic16 which is why it specifies
them using -march. But it is wrong to put such tests in CodeGen/Generic,
since not everyone builds these targets. Put a copy of the test in each
of the target test directories.
llvm-svn: 90005
2009-11-27 16:04:14 +00:00
700c4ab3f9
Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!
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llvm-svn: 86471
2009-11-08 15:33:12 +00:00
4ca8d3a6a6
Fix invalid operand updates & implement post-inc memory operands
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llvm-svn: 86466
2009-11-08 14:27:38 +00:00
dc2beaa05e
It is invalid to infer the value type from the result #0 of the node
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since the instruction might use the other result of different type.
llvm-svn: 86462
2009-11-08 12:14:54 +00:00
d3c8319f48
Add some dummy support for post-incremented loads
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llvm-svn: 86385
2009-11-07 17:15:06 +00:00
f93bb39b03
Add 8 bit libcalls and make use of them for msp430
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llvm-svn: 86384
2009-11-07 17:14:39 +00:00
2a88785685
Initial support for addrmode handling. Tests by Brian Lucas!
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llvm-svn: 86382
2009-11-07 17:13:35 +00:00
f1ad2c618a
Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected.
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Yay for ASCII graphics!
llvm-svn: 84808
2009-10-22 00:16:00 +00:00
9e92857b38
Add DAG printing for RMW stuff debugging
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llvm-svn: 84776
2009-10-21 19:18:28 +00:00
ccfa3e31f7
RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them.
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llvm-svn: 84775
2009-10-21 19:17:55 +00:00
7cea91e171
Add reg-imm tests
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llvm-svn: 84705
2009-10-21 00:11:44 +00:00
258c7fa33a
Eliminate some redundant llvm-as calls.
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llvm-svn: 83837
2009-10-12 09:31:55 +00:00
4b38ce9f25
Add missed mem-mem move patterns
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llvm-svn: 83812
2009-10-11 23:03:53 +00:00
415c3dc501
Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinements
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llvm-svn: 83811
2009-10-11 23:03:28 +00:00
da0508fe15
Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my refinements
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llvm-svn: 83809
2009-10-11 23:02:38 +00:00
6bce6bbf40
Implement 'm' memory operand properly
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llvm-svn: 83785
2009-10-11 19:14:21 +00:00
5b8826b4da
It seems that OR operation does not affect status reg at all.
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Remove impdef of SRW. This fixes PR4779
llvm-svn: 83739
2009-10-10 22:17:47 +00:00
592638ae05
Allow symbols to start from the digit if target requests it. This allows, e.g. pinning
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variables to specified absolute address. Make use of this feature for MSP430.
This unbreaks PR4776.
llvm-svn: 82227
2009-09-18 16:57:42 +00:00
c8054d90fb
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81293
2009-09-09 00:09:15 +00:00
a0e01bec87
Add dummy inline asm handling for 'r' constraint. This fixes PR4778
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llvm-svn: 80085
2009-08-26 13:44:29 +00:00
271cdda8e1
Provide dynamic_stackalloc lowering for MSP430.
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This fixes PR4769
llvm-svn: 80001
2009-08-25 17:00:23 +00:00
a5b9645c4b
Split the Add, Sub, and Mul instruction opcodes into separate
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integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
llvm-svn: 72897
2009-06-04 22:49:04 +00:00
9030c35eb4
Fix for PR4235: to build a floating-point value from integer parts,
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build an integer and cast that to a float. This fixes a crash
caused by trying to split an f32 into two f16's.
This changes the behavior in test/CodeGen/XCore/fneg.ll because that
testcase now triggers a DAGCombine which converts the fneg into an integer
operation. If someone is interested, it's probably possible to tweak
the test to generate an actual fneg.
llvm-svn: 72162
2009-05-20 06:02:09 +00:00
6de08cd093
Mark rotl/rotr as expand. This generates pretty ugly code, but this is better than nothing.
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llvm-svn: 71976
2009-05-17 10:16:28 +00:00
6b5523aec2
Typo
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llvm-svn: 71975
2009-05-17 10:15:22 +00:00
7706cb8d5d
Add MSP430 test for PR4136
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llvm-svn: 71392
2009-05-10 14:48:36 +00:00
Dale Johannesen