Commit Graph

2409 Commits

Author SHA1 Message Date
Misha Brukman 7f245d47c5 GhostLinkage should not reach asm printing stage
llvm-svn: 17750
2004-11-14 21:03:49 +00:00
Misha Brukman e225fa12ab Handle GhostLinkage (should not ever reach the assembly printing stage!)
llvm-svn: 17749
2004-11-14 21:03:30 +00:00
Misha Brukman 8b8ba9fcf7 Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC)
llvm-svn: 17744
2004-11-14 20:34:01 +00:00
Brian Gaeke e13c960415 Fix problem with insertion point for ADJCALLSTACKDOWN.
llvm-svn: 17733
2004-11-14 06:32:08 +00:00
Brian Gaeke a281ebc490 Update lists of failing unit tests.
Exclude bigfib, so that we effectively exclude all C++ benchmarks.
Update to-do list: mention va_start.

llvm-svn: 17732
2004-11-14 06:32:07 +00:00
Brian Gaeke 347a000be6 Fix NotTest - round up extraStack to the nearest doubleword, if it is
not zero.

llvm-svn: 17728
2004-11-14 05:19:00 +00:00
Brian Gaeke e90176e171 Update failing Benchmarks; point out that I'm skipping Shootout-C++.
llvm-svn: 17725
2004-11-14 04:43:12 +00:00
Brian Gaeke 18b6015b11 Update expected UnitTests failures.
llvm-svn: 17723
2004-11-14 03:22:08 +00:00
Brian Gaeke e6b47514a3 Rewrite outgoing arg handling to handle more weird corner cases.
llvm-svn: 17722
2004-11-14 03:22:07 +00:00
Brian Gaeke 07097e12d5 Support UndefValue emission.
llvm-svn: 17721
2004-11-14 03:22:05 +00:00
Chris Lattner 56c4c99cca Don't print unneeded labels
llvm-svn: 17714
2004-11-13 23:27:11 +00:00
Chris Lattner 073f6ca344 Hack around stupidity in GCC, fixing Burg with the CBE and
CBackend/2004-11-13-FunctionPointerCast.llx

llvm-svn: 17710
2004-11-13 22:21:56 +00:00
Chris Lattner 049d33a717 shld is a very high latency operation. Instead of emitting it for shifts of
two or three, open code the equivalent operation which is faster on athlon
and P4 (by a substantial margin).

For example, instead of compiling this:

long long X2(long long Y) { return Y << 2; }

to:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        shldl $2, %eax, %edx
        shll $2, %eax
        ret

Compile it to:

X2:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        shrl $30, %edx
        leal (%edx,%ecx,4), %edx
        shll $2, %eax
        ret

Likewise, for << 3, compile to:

X3:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        shrl $29, %edx
        leal (%edx,%ecx,8), %edx
        shll $3, %eax
        ret

This matches icc, except that icc open codes the shifts as adds on the P4.

llvm-svn: 17707
2004-11-13 20:48:57 +00:00
Chris Lattner ef6bd92a8c Add missing check
llvm-svn: 17706
2004-11-13 20:04:38 +00:00
Chris Lattner 8d521bb16e Compile:
long long X3_2(long long Y) { return Y+Y; }
int X(int Y) { return Y+Y; }

into:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        addl %eax, %eax
        adcl %edx, %edx
        ret
X:
        movl 4(%esp), %eax
        addl %eax, %eax
        ret

instead of:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        shldl $1, %eax, %edx
        shll $1, %eax
        ret

X:
        movl 4(%esp), %eax
        shll $1, %eax
        ret

llvm-svn: 17705
2004-11-13 20:03:48 +00:00
John Criswell 04570265a5 Correct the name of stosd for the AT&T syntax:
It's stosl (l for long == 32 bit).

llvm-svn: 17658
2004-11-10 04:48:15 +00:00
Nate Begeman 1164955bf1 Allow hbd to be bugpointable on darwin by fixing common and linkonce codegen
llvm-svn: 17637
2004-11-09 04:01:18 +00:00
Nate Begeman 0822032c95 Put int the getReg cast optimization from x86 so that we generate fewer
move instructions for the register allocator to coalesce.

llvm-svn: 17608
2004-11-08 02:25:40 +00:00
Nate Begeman f5f0b6b6b0 Disable bogus cast elimination when the cast is used by a setcc instruction.
llvm-svn: 17583
2004-11-07 20:23:42 +00:00
Chris Lattner b3ba9319f1 Decompose* is V9 specific, make it internal
llvm-svn: 17547
2004-11-07 00:43:24 +00:00
Chris Lattner 3dadadc837 Move this file from lib/Transforms/Scalar
llvm-svn: 17544
2004-11-07 00:39:09 +00:00
John Criswell ab79288e37 Fix compilation problem; make the cast and the LHS be the same type.
llvm-svn: 17488
2004-11-05 16:17:06 +00:00
Chris Lattner 429aaa5855 Quiet VC++ warnings
llvm-svn: 17484
2004-11-05 04:50:59 +00:00
Nate Begeman bff3d4abf0 Thanks to sabre for pointing out that we were incorrectly codegen'ing
int test(int x) { return 32768 - x; }

Fixed by teaching the function that checks a constant's validity to be used
as an immediate argument about subtract-from instructions.

llvm-svn: 17476
2004-11-04 19:43:18 +00:00
Brian Gaeke 0da246f535 Handle "call" operands of type long/ulong passed in registers.
llvm-svn: 17464
2004-11-04 00:27:04 +00:00
Chris Lattner cff3b41e95 Fix this function to not say that longs have 8-byte alignment on X86/PPC.
This method is really a gross hack, but at least we can make it work on
the targets we support right now.

This bug fix stops a crash in a testcase reduced from 176.gcc

llvm-svn: 17443
2004-11-02 22:18:18 +00:00
Tanya Lattner 444be61ea6 Added gross hacks such as creating my own def-use map, and picking on Instruction that I can add all my TmpInstructions to its MCFI.
llvm-svn: 17441
2004-11-02 21:04:56 +00:00
Chris Lattner 99d7bb3378 Fix a warning
llvm-svn: 17431
2004-11-02 15:27:57 +00:00
Chris Lattner 720eb217a7 Add placeholder variable to make Win32 work, applied for Morten Ofstad
llvm-svn: 17406
2004-11-01 20:10:20 +00:00
Reid Spencer f88808ae43 Internalize variable names to prevent recursive assignment. Cleanup docs.
llvm-svn: 17359
2004-10-30 09:19:36 +00:00
Tanya Lattner ddebd1eeaa Fixed bug with infinite epilogues.
Fixed issue with generating the partial order. It now adds the nodes not in recurrences in sets for each connected component.

llvm-svn: 17351
2004-10-30 00:39:07 +00:00
Brian Gaeke b87e08e0ef Change name of target lib to conform to new naming scheme.
llvm-svn: 17347
2004-10-29 21:57:16 +00:00
Brian Gaeke 6254a798ca Remove dependency on MRegisterInfo::getRegClass
llvm-svn: 17346
2004-10-29 21:42:27 +00:00
Reid Spencer 57cbe39d1e Change Library Names Not To Conflict With Others When Installed
llvm-svn: 17286
2004-10-27 23:18:45 +00:00
Nate Begeman a2b117c68a Move destructor out of line to avoid vtable emission in every file that includes the header. Thanks to sabre.
llvm-svn: 17278
2004-10-27 06:00:53 +00:00
Nate Begeman c193790dbb Fix the build by eliminating some more dead code. That'll learn me not to listen to Reid
llvm-svn: 17275
2004-10-27 05:44:23 +00:00
Nate Begeman 7fed324ffc Remove include of MRegisterInfo.h, since it is already included by
SkeletonGenRegisterInfo.h.inc

llvm-svn: 17245
2004-10-26 06:04:23 +00:00
Nate Begeman dd8f1d8b77 Remove file that is no longer used, and move include of MRegisterInfo.h
from PowerPCFrameInfo.h to PowerPCAsmPrinter.cpp where it is actually
needed.

llvm-svn: 17244
2004-10-26 06:02:38 +00:00
Nate Begeman 47b9d33f5b Eliminate usage of MRegisterInfo::getRegClass(physreg)
llvm-svn: 17240
2004-10-26 05:40:45 +00:00
Nate Begeman 4c6e1d694c Update to-do list
llvm-svn: 17235
2004-10-26 04:10:53 +00:00
Nate Begeman 26feb4f6d8 Fix treecc. Also fix a latent bug in emitBinaryConstOperation that would
allow and const, 0 to be incorrectly codegen'd into a rlwinm instruction.

llvm-svn: 17234
2004-10-26 03:48:25 +00:00
Chris Lattner ff43ef3cc5 Disable the JIT until it can sorta kinda work.
llvm-svn: 17230
2004-10-25 20:53:41 +00:00
Chris Lattner 21c6c41dcc Remove dead assert
llvm-svn: 17221
2004-10-25 19:04:01 +00:00
John Criswell 7eeed938bf Removed dead method, printPHICopiesForSuccessors().
llvm-svn: 17216
2004-10-25 18:41:50 +00:00
John Criswell a564e9e0ba Modified switch generation so that only the phi values associated with the
destination basic block are copied.

llvm-svn: 17212
2004-10-25 18:30:09 +00:00
Nate Begeman 74b7c1f3e0 Implement more complete and correct codegen for bitfield inserts, as tested
by the recently committed rlwimi.ll test file.  Also commit initial code
for bitfield extract, although it is turned off until fully debugged.

llvm-svn: 17207
2004-10-24 10:33:30 +00:00
Misha Brukman 9ce0da9e90 * Correctly handle the MovePCtoLR pseudo-instr with a bl to next instr
* Stop the confusion of using rv and Addr for global addresses: just use rv

llvm-svn: 17195
2004-10-23 23:47:34 +00:00
Misha Brukman f1f6270708 Add BA, BL, and BLA opcodes
llvm-svn: 17193
2004-10-23 20:29:24 +00:00
Misha Brukman 421c3c1ec4 * Do not emit IMPLICIT_DEF pseudo-instructions
* Convert register numbers from their opcode value to the real value, e.g.
  PPC::R1 => 1 and PPC::F1 => 1
* Add correct handling of loading of global values which are PC-relative --
  implement ha16() and lo16()

llvm-svn: 17190
2004-10-23 18:28:01 +00:00
Misha Brukman 15b0fb5678 DForm_1, particularly used by store instructions, needs the immediate operand to
be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents

llvm-svn: 17183
2004-10-23 06:08:38 +00:00