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38320 Commits

Author SHA1 Message Date
Chris Lattner 87cffa9498 switch MCSectionCOFF from a syntactic to semantic representation, 
patch by Peter Housel!

llvm-svn: 103267
 2010-05-07 17:17:41 +00:00
Ted Kremenek d90773ebe0 Update CMake build. 
llvm-svn: 103266
 2010-05-07 17:13:20 +00:00
Dan Gohman 50689f0bb9 Add some words to this output to indicate what the numbers mean. 
llvm-svn: 103264
 2010-05-07 16:39:27 +00:00
Dan Gohman fb64b5dff4 Add a simple module-level debug info printer. It just sets up a 
DebugInfoFinder and iterates over all the contents calling print.

llvm-svn: 103262
 2010-05-07 16:22:32 +00:00
Dan Gohman 6c30e879f8 Fix the new print functions to call print instead of dump. 
llvm-svn: 103261
 2010-05-07 16:17:22 +00:00
Dan Gohman 5d5b8b1b8c Add an LLVM IR version of code sinking. This uses the same simple algorithm 
as MachineSink, but it isn't constrained by MachineInstr-level details.

llvm-svn: 103257
 2010-05-07 15:40:13 +00:00
Dan Gohman 4bbcf644da Convert the DebugInfo classes dump() methods into print(raw_ostream &) 
methods, and add dump functions implemented in terms of the print.

llvm-svn: 103254
 2010-05-07 15:30:29 +00:00
Evan Cheng 86eb22976f Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack slot is sufficiently aligned. Use VLDMD / VSTMD otherwise. 
llvm-svn: 103235
 2010-05-07 02:04:02 +00:00
Evan Cheng 04d47e8efa Use VSTMD / VLDMD for spills and reloads of Q registers instead of VSTMQ / VLDQ. The later are aliases which ought to be eliminated but we can't because they are used for storing and loading v2f64 values. 
llvm-svn: 103234
 2010-05-07 01:54:08 +00:00
Nick Lewycky 45f530db39 Revert r103133 and add testcase from PR7066. 
llvm-svn: 103233
 2010-05-07 01:45:38 +00:00
Dan Gohman 90c600d6d2 When rematerializing, use the debug location of the original 
instruction, rather than a location near where the new instruction
is being inserted.

llvm-svn: 103232
 2010-05-07 01:28:10 +00:00
Dan Gohman e6d40166a8 Transfer debug location information from PHI nodes to resulting 
lowered copies.

llvm-svn: 103228
 2010-05-07 01:10:20 +00:00
Dan Gohman e7dff14d5d Print debug information for SDNodes. 
llvm-svn: 103227
 2010-05-07 01:09:21 +00:00
Dan Gohman 7421ae48bf Disable the new unknown-location code for now. It causes a major 
increase in the debug line info section, and it's causing
regressions in a gdb testsuite.

llvm-svn: 103226
 2010-05-07 01:08:53 +00:00
Evan Cheng ddc93c7e04 Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q64 / VST1q64 and reference sub-registers. 
llvm-svn: 103218
 2010-05-07 00:24:52 +00:00
Daniel Dunbar 21aa523c28 MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand. 
- This fixes "leal 0, %eax", for example.

llvm-svn: 103205
 2010-05-06 22:39:14 +00:00
Chris Lattner 348dc9b15a fix rdar://7947167 - llvm-mc doesn't match movsq 
llvm-svn: 103199
 2010-05-06 21:48:14 +00:00
Sean Callanan e7e1cf9fbd Eliminated the classification of control registers into %ecr_ 
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.

llvm-svn: 103196
 2010-05-06 20:59:00 +00:00
Daniel Dunbar 358b29c855 MC/X86: Error out if we see a non-constant FK_Data_1 or FK_Data_2 fixup, since 
we don't currently support relaxing them.

llvm-svn: 103195
 2010-05-06 20:34:01 +00:00
Dan Gohman 779c69bbc5 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.

llvm-svn: 103194
 2010-05-06 20:33:48 +00:00
Evan Cheng efb126a665 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. 
llvm-svn: 103193
 2010-05-06 19:06:44 +00:00
Evan Cheng f0ac19a6d5 80 col violation. 
llvm-svn: 103185
 2010-05-06 16:33:12 +00:00
Bob Wilson f765e1f34a Add a missing break statement to fix unintentional fall-through 
(replacing the previous patch for the same issue).

llvm-svn: 103183
 2010-05-06 16:05:26 +00:00
Jim Grosbach 5e3cccb1e4 Fix unintentional fallthrough. Patch by Edmund Grimley-Evans <Edmund.Grimley-Evans@arm.com> 
llvm-svn: 103181
 2010-05-06 15:32:49 +00:00
Shantonu Sen 94231eec1f Fix "warning: extra ';' inside a struct or union" when building llvm with clang 
llvm-svn: 103179
 2010-05-06 14:57:47 +00:00
Daniel Dunbar b0ceb764b8 Revert r103137, fix for $ in labels. It looks like we can't actually handle this 
at the token level. Consider the following horrible test case:

  a = 1
  .globl $a
  movl ($a), %eax
  movl $a, %eax
  movl $$a, %eax

llvm-svn: 103178
 2010-05-06 14:46:38 +00:00
Evan Cheng 31cdcd46d6 Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170. 
llvm-svn: 103172
 2010-05-06 06:36:08 +00:00
Evan Cheng c0255bac1d Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.ll 
with the fix in 103157.

%reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0
is not coalescable since none of the super-registers of S1 are in reg1039's
register class: DPR_VFP2. But it is still a legal copy instruction so it should
not assert.

llvm-svn: 103170
 2010-05-06 06:23:31 +00:00
Dan Gohman 77c71811f5 Revert r103157, which broke test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll. 
llvm-svn: 103163
 2010-05-06 05:08:57 +00:00
Eric Christopher 9feb1bb117 Revert r103156 since it was breaking the build bots. 
Reverse-merging r103156 into '.':
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/ARMRegisterInfo.h
U    lib/Target/ARM/ARMBaseRegisterInfo.cpp
U    lib/Target/ARM/ARMBaseInstrInfo.cpp
U    lib/Target/ARM/ARMRegisterInfo.td

llvm-svn: 103159
 2010-05-06 02:29:06 +00:00
Dan Gohman d351116be0 Handle the case where open(2) or close(2) is interrupted by a signal when 
automatic syscall restarting is disabled.

Also, fix the build on systems which don't define EWOULDBLOCK.

llvm-svn: 103158
 2010-05-06 02:06:20 +00:00
Evan Cheng 8fd7b510d6 Fix an obvious bug in isMoveInstr. It needs to return sub-register indices. 
llvm-svn: 103157
 2010-05-06 01:54:03 +00:00
Evan Cheng 8f99a1c6b4 Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registers. These will be used to model VLD2 / VST2 instructions in order to get substantially better codegen for them. 
llvm-svn: 103156
 2010-05-06 01:52:03 +00:00
Evan Cheng 9d768f4445 Cosmetic changes. 
llvm-svn: 103155
 2010-05-06 01:34:11 +00:00
Evan Cheng 718ff448df storeRegToStackSlot has forgotten about QPR_8 register class. 
llvm-svn: 103154
 2010-05-06 01:32:54 +00:00
Dan Gohman ef969f3539 Handle EWOULDBLOCK as EAGAIN. And add a comment explaining why 
EAGAIN and EWOULDBLOCK are used here.

Also, handle the case where a write call is interrupted after
some data has already been written.

llvm-svn: 103153
 2010-05-06 01:27:36 +00:00
Dan Gohman 47d04e3e41 Update LabelsBeforeInsn also, when creating unknown-position labels. 
llvm-svn: 103145
 2010-05-06 00:29:41 +00:00
Chris Lattner 35096e82c5 Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol twice!"' failed. 
Users can write broken code that emits the same label twice with asm renaming,
detect this and emit a fatal backend error instead of aborting.

llvm-svn: 103140
 2010-05-06 00:05:37 +00:00
Dan Gohman a7c717d8d4 In bottom-up mode, defer the materialization of local constant values. 
llvm-svn: 103139
 2010-05-06 00:02:14 +00:00
Dan Gohman ffcb590b0f Add an "IsBottomUp" member function to FastISel, which will be used to 
support a new bottom-up mode.

llvm-svn: 103138
 2010-05-05 23:58:35 +00:00
Chris Lattner 482fa218d4 fix rdar://7946934 - in some limited cases, the assembler should 
allow $ at the start of a symbol name.

llvm-svn: 103137
 2010-05-05 23:51:28 +00:00
Jim Grosbach 151cd8f159 Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack 
instructions to subtarget features and update tests to reflect.
PR5717.

llvm-svn: 103136
 2010-05-05 23:44:43 +00:00
Dan Gohman 50849c63e4 Emit debug info for MachineInstrs with unknown debug locations, instead 
of just letting them inherit the debug locations of adjacent instructions.

Debug info should aim to be either accurate or absent.

llvm-svn: 103135
 2010-05-05 23:41:32 +00:00
Jakob Stoklund Olesen 1b6f698e85 Fix PR6520. An earlyclobber physreg must not be allocated to anything else. 
llvm-svn: 103133
 2010-05-05 23:07:41 +00:00
Sean Callanan 4cd930f417 Fixed a sign-extension bug in the X86 disassembler 
that was causing PC-relative branch targets to be
evaluated incorrectly.  Also added support for
checking operand values to the llvm-mc tester.

llvm-svn: 103128
 2010-05-05 22:47:27 +00:00
Devang Patel 92b21cad5d Use getValue() for PHINodes when direct NodeMap access does not work. 
llvm-svn: 103126
 2010-05-05 22:29:00 +00:00
Evan Cheng 61908f6b6c Do not pre-allocate references of D registers pairs if they are extracted from the same Q register and are in the right order. 
llvm-svn: 103124
 2010-05-05 22:15:40 +00:00
Dan Gohman f62cd20b62 No-ops emitted for scheduling don't correspond with anything in the 
user's source, so don't arbitrarily assign them a debug location.

llvm-svn: 103121
 2010-05-05 20:58:01 +00:00
Jim Grosbach 92d999001c Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch by 
Jordy <snhjordy@gmail.com>.

Followup patches will add some tests and adjust to use Subtarget features
for the instructions.

llvm-svn: 103119
 2010-05-05 20:44:35 +00:00
Bob Wilson 0c8b29bcdb Use the right version of "append" to combine two SmallVectors. 
This fixes the compile-time regressions seen in last night's tests.

llvm-svn: 103118
 2010-05-05 20:44:15 +00:00