Commit Graph

222587 Commits

Author SHA1 Message Date
Mehdi Amini 907313a9cf llvm-config: replace assertions with a helpful error message
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260700
2016-02-12 18:43:10 +00:00
Sean Callanan abece15858 Renamed TestRdar12991846 to the more descriptive TestUnicodeLiterals.
Test cases should not be named after PR or Radar numbers.  It's fine to
annotate them with these numbers in comments, however.

llvm-svn: 260699
2016-02-12 18:42:00 +00:00
Krzysztof Parzyszek fd02aad8fd [Hexagon] Add utility functions to detect sign- and zero-extending loads
llvm-svn: 260698
2016-02-12 18:37:23 +00:00
Artem Belevich 186091094a [CUDA] Tweak attribute-based overload resolution to match nvcc behavior.
This is an artefact of split-mode CUDA compilation that we need to
mimic. HD functions are sometimes allowed to call H or D functions. Due
to split compilation mode device-side compilation will not see host-only
function and thus they will not be considered at all. For clang both H
and D variants will become function overloads visible to
compiler. Normally target attribute is considered only if C++ rules can
not determine which function is better. However in this case we need to
ignore functions that would not be present during current compilation
phase before we apply normal overload resolution rules.

Changes:
* introduced another level of call preference to better describe
  possible call combinations.
* removed WrongSide functions from consideration if the set contains
  SameSide function.
* disabled H->D, D->H and G->H calls. These combinations are
  not allowed by CUDA and we were reluctantly allowing them to work
  around device-side calls to math functions in std namespace.
  We no longer need it after r258880.

Differential Revision: http://reviews.llvm.org/D16870

llvm-svn: 260697
2016-02-12 18:29:18 +00:00
Krzysztof Parzyszek 996ad1fa00 [Hexagon] Replace expansion of spill pseudo-instructions in frame lowering
Rewrite the code to handle all pseudo-instructions in a single pass.

This temporarily reverts spill slot optimization that used general-
purpose registers to hold values of spilled predicate registers.

llvm-svn: 260696
2016-02-12 18:19:53 +00:00
David Majnemer 0f0abc7bc2 [InstCombine] Don't aggressively replace xor with icmp
For some cases, InstCombine replaces the sequence of xor/sub instruction
followed by cmp instruction into a single cmp instruction.

However, this replacement may result suboptimal result especially when
the xor/sub has more than one use, as discussed in
bug 26465 (https://llvm.org/bugs/show_bug.cgi?id=26465).

This patch make the replacement happen only when xor/sub has only one
use.

Differential Revision: http://reviews.llvm.org/D16915

Patch by Taewook Oh!

llvm-svn: 260695
2016-02-12 18:12:38 +00:00
Tom Stellard 46937ca4e7 [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler
Historically, AMD internal sp3 assembler has flat_store* addr, data
format. To match existing code and to enable reuse, change LLVM
definitions to match.  Also update MC and CodeGen tests.

Differential Revision: http://reviews.llvm.org/D16927

Patch by: Nikolay Haustov

llvm-svn: 260694
2016-02-12 17:57:54 +00:00
Changpeng Fang e07f1aa8fa AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass.
Summary:
  It is possible that the loop condition can be a boolean constant (infinite loop,
for example). So we sould handle constant condition in annotating a loop. This
patch adds this functionality to support annotating constant condition.

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits, arsenm

Differential Revision: http://reviews.llvm.org/D15093

llvm-svn: 260692
2016-02-12 17:11:04 +00:00
Krzysztof Parzyszek 7ce3dbcb57 [Hexagon] Remove HexagonExpandPredSpillCode pass
This code is dead. The expansion is now done in HexagonFrameLowering.

llvm-svn: 260691
2016-02-12 17:09:58 +00:00
Krzysztof Parzyszek 7d5b4db7f9 [Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
We can generate the actual instructions from the intrinsics without the
need for pseudo-instructions. Also, since the intrinsics have a side-
effect in a form of a store, attempt to optimize away loads from the
store location.

llvm-svn: 260690
2016-02-12 17:01:51 +00:00
Geoff Berry c25d3bd238 [AArch64] Reduce number of callee-save save/restores.
Summary:
Before this change, callee-save registers would be rounded up to even
pairs of GPRs and FPRs.  This change eliminates these extra padding
load/stores, though it does keep the stack allocation the same size
unless both the GPR and FPR sets have an odd size, in which case one
full pair stack slot (16 bytes) is saved.

This optimization cannot currently be done for MachO targets since they
rely on a fast-path .debug_frame equivalent that can only encode
callee-save registers as pairs.

Reviewers: t.p.northover, rengolin, mcrosier, jmolloy

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17000

llvm-svn: 260689
2016-02-12 16:31:41 +00:00
Krzysztof Parzyszek bdb04d9032 [Hexagon] Handle out-of-range offsets in eliminateFrameIndex
Create a virtual register that will hold the actual address and use it
with the offset of 0 in the place of the original FI.

llvm-svn: 260688
2016-02-12 16:27:23 +00:00
Chad Rosier cd2be7f084 [AArch64] Add support for Qualcomm Kryo CPU.
Machine model description by Dave Estes <cestes@codeaurora.org>.

llvm-svn: 260686
2016-02-12 15:51:51 +00:00
Rafael Espindola 852860e920 make needsPlt a pure predicate.
llvm-svn: 260685
2016-02-12 15:47:37 +00:00
Rafael Espindola cbc31d699b Delete the deprecated LLVMLinkModules.
llvm-svn: 260683
2016-02-12 15:28:45 +00:00
Jun Bum Lim 397eb7b0b3 [AArch64] Merge two adjacent str WZR into str XZR
Summary:
This change merges adjacent 32 bit zero stores into a 64 bit zero store.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
becomes
  str xzr, [x0]

Therefore, four adjacent 32 bit zero stores will be a single stp.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
  str wzr, [x0, #8]
  str wzr, [x0, #12]
becomes
  stp xzr, xzr, [x0]

Reviewers: mcrosier, jmolloy, gberry, t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16933

llvm-svn: 260682
2016-02-12 15:25:39 +00:00
Aaron Ballman f034a8c7d7 Reapply r260096.
Expand the simplify boolean expression check to handle implicit conversion of integral types to bool and improve the handling of implicit conversion of member pointers to bool.

Implicit conversion of member pointers are replaced with explicit comparisons to nullptr.

Implicit conversions of integral types are replaced with explicit comparisons to 0.

Patch by Richard Thomson.

llvm-svn: 260681
2016-02-12 15:09:05 +00:00
Krzysztof Parzyszek 8e57697cfd [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260680
2016-02-12 14:48:34 +00:00
Daniel Sanders 2f1025d68a Re-commit r260230 with a fix for clang-cmake-aarch64-42vma.
There is now a default name_suffix ('default') which should appease the buildbot
and reveal why this builder lacks a suffix.

llvm-svn: 260679
2016-02-12 14:48:19 +00:00
Krzysztof Parzyszek e59964377c [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260678
2016-02-12 14:47:38 +00:00
Adhemerval Zanella 74bcf03f87 [lld] [ELF/AArch64] Add support to some GD/LE/IS TLS relocations
This patch adds some TLS relocations and relaxations for AArch64.
Some Global-Dynamic relocation are handled by optimizing them to
Local-Exec (Initial-Exec is not yet supported). They are:

 - R_AARCH64_TLSDESC_ADR_PAGE21
 - R_AARCH64_TLSDESC_LD64_LO12_NC
 - R_AARCH64_TLSDESC_ADD_LO12_NC
 - R_AARCH64_TLSDESC_CALL

Also some Init-Exec is optimized to Local-Exec if possible. They are:

 - R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
 - R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC

Finally some Local-Exec relocation are handled in relocateOne:

 - R_AARCH64_TLSLE_ADD_TPREL_HI12
 - R_AARCH64_TLSLE_ADD_TPREL_LO12_NC

This work is mainly for compiler bootstrap, where static binaries is
showing good progress (although shared object still lacking support
from both TLS aarch64 backend and some other issues).

llvm-svn: 260677
2016-02-12 13:43:03 +00:00
Benjamin Kramer ac5e36f52e Fix uninitialized memory read.
Found by msan.

llvm-svn: 260676
2016-02-12 12:37:21 +00:00
Olivier Goffart 8bc0caa2e9 Fix ICE with constexpr and friend functions
Fix a crash while parsing this code:

  struct X  {
    friend constexpr int foo(X*) { return 12; }
    static constexpr int j = foo(static_cast<X*>(nullptr));
  };

Differential Revision: http://reviews.llvm.org/D16973

llvm-svn: 260675
2016-02-12 12:34:44 +00:00
Jonas Hahnfeld 867aa20b1e [OMPT] Frame information for openmp taskwait
For pragma omp taskwait the runtime is called from the task context.
Therefore, the reentry frame information should be updated.

The information should be available for both taskwait event calls; therefore,
set before the first event and reset after the last event.

Patch by Joachim Protze
Differential Revision: http://reviews.llvm.org/D17145

llvm-svn: 260674
2016-02-12 12:19:59 +00:00
Hrvoje Varga 02f99ea13d [mips][micromips] Written missing test for CEIL.L.S, CEIL.L.D, FLOOR.L.S and FLOOR.L.D instructions
Differential Revision: http://reviews.llvm.org/D17192

llvm-svn: 260673
2016-02-12 12:11:26 +00:00
Daniel Sanders 6c400643cd Revert r260669 while the clang-cmake-aarch64-42vma failures is investigated.
There's no obvious reason it should fail in this way but it's the only change
on the blamelist. I suspect stale lit*.cfg's from previous builds.

llvm-svn: 260672
2016-02-12 12:09:57 +00:00
Anastasia Stulova 1202de3ec8 [OpenCL] Disable C99 standard lib functions
The library functions defined in the C99 standard headers
are not available (OpenCL v1.2 s6.9.f). 

This change stops treating OpenCL builtin functions as standard C lib
functions to eliminate warning messages about printf format string.

Patch by Liu Yaxun (Sam)!

Differential Revision: http://reviews.llvm.org/D16812

llvm-svn: 260671
2016-02-12 12:07:04 +00:00
Haojian Wu ebe01560a3 Remove LLVMGetTargetMachineData in go-binding.
Summary:
LLVMGetTargetMachineData has been removed, and LLVMGetDataLayout is
suggested to use. The LLVMGetDataLayout is exposed in go bindings.
So it's safe to remove the function.

Reviewers: bkramer

Subscribers: llvm-commits, axw

Differential Revision: http://reviews.llvm.org/D17193

llvm-svn: 260670
2016-02-12 11:35:11 +00:00
Daniel Sanders fe567fb366 [msan+tsan] Bring back the tests that disappeared after r260230 and r259512.
The lit test-suite containing the unit tests needs to be explicitly specified
as an argument to lit.py since it is no longer discovered when the other tests
are run (because they are one directory deeper).

dfsan, lsan, and sanitizer_common don't show the same problem.

llvm-svn: 260669
2016-02-12 10:35:53 +00:00
Chandler Carruth 3937bc70f9 [attrs] Simplify the convergent removal to directly use the pre-built
node set rather than walking the SCC directly.

This directly exposes the functions and has already had null entries
filtered out. We also don't need need to handle optnone as it has
already been handled in the caller -- we never try to remove convergent
when there are optnone functions in the SCC.

With this change, the code for removing convergent should work with the
new pass manager and a different SCC analysis.

llvm-svn: 260668
2016-02-12 09:47:49 +00:00
Daniel Marjamaki 1fba76a3b9 [clang-tidy] Fix failure in 'misc-misplaced-widening-cast' test.
I added portability warnings when int results are casted to long. I forgot to handle uint, ulong and ulonglong.

Tested on x86 and powerpc targets, hope it works now on all buildbots.

llvm-svn: 260667
2016-02-12 09:38:38 +00:00
Chandler Carruth 057df3d423 [attrs] Consolidate the test for a non-SCC, non-convergent function call
with the test for a non-convergent intrinsic call.

While it is possible to use the call records to search for function
calls, we're going to do an instruction scan anyways to find the
intrinsics, we can handle both cases while scanning instructions. This
will also make the logic more amenable to the new pass manager which
doesn't use the same call graph structure.

My next patch will remove use of CallGraphNode entirely and allow this
code to work with both the old and new pass manager. Fortunately, it
should also get strictly simpler without changing functionality.

llvm-svn: 260666
2016-02-12 09:23:53 +00:00
Daniel Marjamaki 79355776e3 [clang-tidy] improve misc-misplaced-widening-cast so it also detects portability problems.
Reviewers: alexfh

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D17140

llvm-svn: 260665
2016-02-12 07:51:10 +00:00
Enrico Granata 2543d29048 The data formatters for NSArray, NSDictionary and (only partially) NSSet contain logic to inspect the objects without running code.
However, they also contain fallback logic that - in cases where LLDB can't recognize the specific subclass - actually does run code in order to inspect those objects.

The argument for this logic was that these data types are critical enough that the risk of getting it wrong is outweighed by the advantage of always providing accurate child information.

Practical experience however shows that "po" - a code running data-inspection command - is quite frequently used, and not considered burdensome by users.
As such, this makes the code-running fallback in the data formatters a risk that carries very little actual reward. Also, unlike the time this code was originally written, we now have accurate class information for Objective-C, and thus we are less likely to improperly identify classes.

This commit removes support for the code-running fallback, and aligns the data formatters for NSArray, NSDictionary and NSSet to the general no-code-running behavior of other data formatters.

While it is possible for us to add support for some subclasses that are now no longer covered by static inspection alone, this is beyond the scope of this commit.

llvm-svn: 260664
2016-02-12 07:50:15 +00:00
Argyrios Kyrtzidis 47134196fc [unittests/ADT] OptionSetTest: ifdef out for now a specific test that fails on MSVC.
llvm-svn: 260663
2016-02-12 07:50:01 +00:00
Jonas Hahnfeld aae8374004 [CMake] Add option to switch default C++ stdlib
With this option one can optionally override the architecture dependent
default library to use if no -stdlib= is provided on compiler invocation.

Differential Revision: http://reviews.llvm.org/D15920

llvm-svn: 260662
2016-02-12 07:48:37 +00:00
Jonas Hahnfeld 91924a6f63 tests: Add explicit -stdlib=libstdc++ to tests that require it
This will be needed for the next commit that allows to switch the default
C++ library which would otherwise make these tests fail.

llvm-svn: 260661
2016-02-12 07:48:28 +00:00
Matt Arsenault 296b849163 AMDGPU: Set flat_scratch from flat_scratch_init reg
This was hardcoded to the static private size, but this
would be missing the offset and additional size for someday
when we have dynamic sizing.

Also stops always initializing flat_scratch even when unused.

In the future we should stop emitting this unless flat instructions
are used to access private memory. For example this will initialize
it almost always on VI because flat is used for global access.

llvm-svn: 260658
2016-02-12 06:31:30 +00:00
Mehdi Amini f71d653879 C API: Remove LLVMGetDataLayout that was deprecated in 3.7
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260657
2016-02-12 06:22:00 +00:00
Mark Lacey 802f19a170 Fix minor error with debug info doc.
Replace 'third' with 'fourth' in the description of the fourth argument.

llvm-svn: 260656
2016-02-12 06:19:16 +00:00
Argyrios Kyrtzidis 6a5c06eaad [unittests/ADT] OptionSetTest: ifdef out a part that fails to compile on MSVC.
llvm-svn: 260655
2016-02-12 05:52:37 +00:00
Argyrios Kyrtzidis 2329967714 [ADT] OptionSet: ifdef out some code that seems to be crashing MSVC.
llvm-svn: 260654
2016-02-12 04:36:48 +00:00
Chandler Carruth bbbbec0b54 [attrs] Run clang-format over a newly added routine in function-attrs
before I update it to be friendly with the new pass manager.

llvm-svn: 260653
2016-02-12 03:07:50 +00:00
Argyrios Kyrtzidis 4538dcb01b [ADT] Introduce ‘OptionSet’ in llvm/ADT headers, which is a utility class that makes it convenient to work with enumerators representing bit options.
llvm-svn: 260652
2016-02-12 02:48:26 +00:00
Matt Arsenault 24ee0785dd AMDGPU: Set element_size in private resource descriptor
Introduce a subtarget feature for this, and leave the default with
the current behavior which assumes up to 16-byte loads/stores can
be used. The field also seems to have the ability to be set to 2 bytes,
but I'm not sure what that would be used for.

llvm-svn: 260651
2016-02-12 02:40:47 +00:00
Kostya Serebryany 9d14e4bb15 [libFuzzer] make -runs=N flag also affect the simple runner (will execute every input N times)
llvm-svn: 260649
2016-02-12 02:32:03 +00:00
Eric Christopher 39a84d0b9b Update functions in clang supplied headers to use the compiler reserved
namespace for arguments.

llvm-svn: 260647
2016-02-12 02:22:53 +00:00
Matt Arsenault 16f7bcb661 AMDGPU: Fix mishandling alignment when scalarizing vector loads/stores
I don't think this was causing any real problems, so I'm not sure
how to test for this.

llvm-svn: 260646
2016-02-12 02:22:21 +00:00
Matt Arsenault 55d49cfe2d AMDGPU: Initialize SILowerControlFlow
llvm-svn: 260645
2016-02-12 02:16:10 +00:00
Matt Arsenault 806dd0a532 AMDGPU: Remove trailing whitespace
llvm-svn: 260644
2016-02-12 02:16:07 +00:00