05285fbf5b
new testcase
...
llvm-svn: 26514
2006-03-04 02:05:07 +00:00
e43e5c0697
add a note
...
llvm-svn: 26513
2006-03-04 01:19:34 +00:00
084a102b17
Typo
...
llvm-svn: 26512
2006-03-04 01:12:00 +00:00
efef036443
New testcase, make sure nate doesn't vanish
...
llvm-svn: 26511
2006-03-04 00:47:12 +00:00
5316e5d6ff
Spec change: the size of a memset/memcpy/memmove is not required to be aligned
...
to the alignment argument.
llvm-svn: 26510
2006-03-04 00:02:10 +00:00
c44f05d624
Added support for dwarf block data entries.
...
llvm-svn: 26509
2006-03-03 21:00:14 +00:00
ae0f1512c9
Silence a warning.
...
llvm-svn: 26508
2006-03-03 19:34:28 +00:00
9929793411
Add another test case for instruction scheduling.
...
llvm-svn: 26507
2006-03-03 18:58:09 +00:00
c2de4f3dc1
Unbreak autouprade of llvm.sqrt, simplify some code.
...
llvm-svn: 26506
2006-03-03 16:31:22 +00:00
88f0fe15a2
Adding basic structure support.
...
llvm-svn: 26505
2006-03-03 15:06:57 +00:00
3bf916ddd9
Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR.
...
llvm-svn: 26504
2006-03-03 07:01:07 +00:00
a7fb285c60
Number of NodeTypes now exceeds 128.
...
llvm-svn: 26503
2006-03-03 06:58:59 +00:00
23e75f5b49
SDOperand::isOperand should not be a forwarding. It must check *this against N's operands.
...
llvm-svn: 26502
2006-03-03 06:42:32 +00:00
6b08ae8497
Added isOperand(N): true if this is an operand of N
...
llvm-svn: 26501
2006-03-03 06:24:54 +00:00
5e9a695026
A bit more tweaking
...
llvm-svn: 26500
2006-03-03 06:23:43 +00:00
f6e846eee8
Fix pasteo
...
llvm-svn: 26499
2006-03-03 06:13:41 +00:00
55c1173a6c
Fix VC++ compilation errors.
...
llvm-svn: 26498
2006-03-03 03:25:07 +00:00
94f300d15c
remove a bunch of long-dead testing code
...
llvm-svn: 26497
2006-03-03 02:34:28 +00:00
93e71f0b72
initial checkin of the intrinsic description file
...
llvm-svn: 26496
2006-03-03 02:33:15 +00:00
c313d0b712
initial implementation of intrinsic parsing
...
llvm-svn: 26495
2006-03-03 02:32:46 +00:00
101a959531
Implemented -quiet feature for analyze
...
llvm-svn: 26494
2006-03-03 02:12:04 +00:00
993e9cf26e
Move #include "llvm/CodeGen/AsmPrinter.h" to top since it's the interface.
...
llvm-svn: 26493
2006-03-03 02:04:29 +00:00
73fbe145fd
remove out of date comment
...
llvm-svn: 26492
2006-03-03 02:04:07 +00:00
76bc04ba5f
update comment
...
llvm-svn: 26491
2006-03-03 01:55:49 +00:00
b203355298
Split the valuetypes out of Target.td into ValueTypes.td
...
llvm-svn: 26490
2006-03-03 01:55:26 +00:00
8a87f5fb18
pass -Illvm/include to tblgen
...
llvm-svn: 26489
2006-03-03 01:54:54 +00:00
842ac68f20
Split this out of Target.td
...
llvm-svn: 26488
2006-03-03 01:54:11 +00:00
1edf15e48e
Add support for "-Ifoo" in addition to "-I foo"
...
llvm-svn: 26487
2006-03-03 01:53:40 +00:00
d7f6b55afa
Regenerate
...
llvm-svn: 26486
2006-03-03 01:47:37 +00:00
e7b74c5da1
add support for multiple include directories
...
llvm-svn: 26485
2006-03-03 01:47:14 +00:00
681ef2f083
Change this to work with renamed intrinsics.
...
llvm-svn: 26484
2006-03-03 01:34:17 +00:00
7f731c5db9
Upgrade this to use the new intrinsic names
...
llvm-svn: 26483
2006-03-03 01:31:12 +00:00
ea7986aeca
Make this work with renamed intrinsics.
...
llvm-svn: 26482
2006-03-03 01:30:23 +00:00
bce2626d8a
updates for recent changes
...
llvm-svn: 26481
2006-03-03 01:21:36 +00:00
72a269f5de
mention some major changes
...
llvm-svn: 26480
2006-03-03 00:34:26 +00:00
ad3c974a77
remove the read/write port/io intrinsics.
...
llvm-svn: 26479
2006-03-03 00:19:58 +00:00
f7d616278e
Remove these testcases. These intrinsics are going away
...
llvm-svn: 26478
2006-03-03 00:16:23 +00:00
0c8b259e5a
Update the llvm.memset/memcpy/memmove intrinsics to reflect the recent split
...
into types.
llvm-svn: 26477
2006-03-03 00:07:20 +00:00
093c159efb
Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving
...
PR709, and paving the way for future progress.
llvm-svn: 26476
2006-03-03 00:00:25 +00:00
259d680c15
Simplify the autoupgrade interface
...
llvm-svn: 26475
2006-03-02 23:59:12 +00:00
d124535de1
Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving
...
PR709, and paving the way for future progress.
Significantly refactor autoupgrading code, to handle the more complex case
(where we upgrade one argument in a function), and fix some bugs in it.
Testcase here: llvm/test/Regression/Bytecode/memcpy.ll
llvm-svn: 26474
2006-03-02 23:58:40 +00:00
3c2733b090
new testcases
...
llvm-svn: 26473
2006-03-02 23:56:23 +00:00
9067500e2e
add a note
...
llvm-svn: 26472
2006-03-02 22:34:38 +00:00
dc41f80f70
Add a regression test for bug 478.
...
llvm-svn: 26471
2006-03-02 21:48:34 +00:00
4e3904f637
- Fixed some priority calculation bugs that were causing bug 478. Among them:
...
a predecessor appearing more than once in the operand list was counted as
multiple predecessor; priority1 should be updated during scheduling;
CycleBound was updated after the node is inserted into priority queue; one
of the tie breaking condition was flipped.
- Take into consideration of two address opcodes. If a predecessor is a def&use
operand, it should have a higher priority.
- Scheduler should also favor floaters, i.e. nodes that do not have real
predecessors such as MOV32ri.
- The scheduling fixes / tweaks fixed bug 478:
.text
.align 4
.globl _f
_f:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
imull %ecx, %edx
imull %eax, %eax
imull %ecx, %ecx
addl %eax, %ecx
leal (%ecx,%edx,2), %eax
ret
It is also a slight performance win (1% - 3%) for most tests.
llvm-svn: 26470
2006-03-02 21:38:29 +00:00
85dda9a2bd
Generalize the REM folding code to handle another case Nick Lewycky
...
pointed out: realize the AND can provide factors and look through Casts.
llvm-svn: 26469
2006-03-02 06:50:58 +00:00
dad25c7f22
add a couple more cases
...
llvm-svn: 26468
2006-03-02 06:50:04 +00:00
3080950acb
Fix a compilation error with GCC 4.1. Thanks to Vladimir Merzliakov for
...
pointing this out.
llvm-svn: 26467
2006-03-02 00:21:41 +00:00
862001ad75
Support for enumerations.
...
llvm-svn: 26466
2006-03-01 23:52:37 +00:00
c652c30772
testcase that crashed the new CFE
...
llvm-svn: 26465
2006-03-01 22:45:12 +00:00
38d5e768b2
Don't print llvm constant in assmebly file. Assembler won't like comments that
...
span multiple lines.
llvm-svn: 26463
2006-03-01 22:18:09 +00:00
5b19a80321
Back out my last check-in. Wrong place to fix it.
...
llvm-svn: 26462
2006-03-01 22:17:00 +00:00
302bdb586f
AsmWriter should not print LLVM constant in comment. Assembler won't like
...
multi-line comments.
llvm-svn: 26461
2006-03-01 22:00:59 +00:00
0db2f2c689
Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loop
...
in the dag combiner on 176.gcc on x86.
llvm-svn: 26459
2006-03-01 21:47:21 +00:00
4a6d29d008
new testcase
...
llvm-svn: 26458
2006-03-01 21:46:53 +00:00
a63009c745
Remove extra comma from enum list.
...
llvm-svn: 26457
2006-03-01 20:49:44 +00:00
088ab4bab6
Remove comma from enum list.
...
llvm-svn: 26456
2006-03-01 20:48:20 +00:00
4e71db13d6
Switch back to using actual dwarf tags. Simplifies code without loss to other
...
debug forms.
llvm-svn: 26455
2006-03-01 20:39:36 +00:00
232024edb8
Fix a typo evan noticed
...
llvm-svn: 26454
2006-03-01 19:55:35 +00:00
f770cf5b90
Use context and not compile unit.
...
llvm-svn: 26453
2006-03-01 18:20:30 +00:00
1246d5c054
I guess I can handle large type sizes.
...
llvm-svn: 26452
2006-03-01 18:13:05 +00:00
b9ac4cba66
Basic array support.
...
llvm-svn: 26451
2006-03-01 17:53:02 +00:00
60a60f4b1e
Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668.
...
llvm-svn: 26450
2006-03-01 07:14:48 +00:00
0454b2d080
load (x|y) -> load (x+y) iff x and y have no common bits.
...
llvm-svn: 26449
2006-03-01 07:13:56 +00:00
3cb349a068
add a note
...
llvm-svn: 26448
2006-03-01 06:36:20 +00:00
27f5345b1f
Compile this:
...
void foo(float a, int *b) { *b = a; }
to this:
_foo:
fctiwz f0, f1
stfiwx f0, 0, r4
blr
instead of this:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
stw r2, 0(r4)
blr
This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.
llvm-svn: 26447
2006-03-01 05:50:56 +00:00
160cc92461
new testcase. These functions shouldn't touch the stack if stfiwx use
...
is enabled.
llvm-svn: 26446
2006-03-01 05:49:05 +00:00
f418435819
Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll.
...
llvm-svn: 26445
2006-03-01 04:57:39 +00:00
21d44e6dfe
new testcase. There should be no accesses to the stack for these functions.
...
llvm-svn: 26444
2006-03-01 04:56:33 +00:00
bc1c85beea
Add support for target-specific dag combines
...
llvm-svn: 26443
2006-03-01 04:53:38 +00:00
4a2eeea671
Add interfaces for targets to provide target-specific dag combiner optimizations.
...
llvm-svn: 26442
2006-03-01 04:52:55 +00:00
fbcd62d3bb
Add a new AddToWorkList method, start using it
...
llvm-svn: 26441
2006-03-01 04:03:14 +00:00
324871ef1a
Pull shifts by a constant through multiplies (a form of reassociation),
...
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll
llvm-svn: 26440
2006-03-01 03:44:24 +00:00
e8ddd8a72f
new testcase
...
llvm-svn: 26439
2006-03-01 03:43:38 +00:00
1926427351
Vector op lowering.
...
llvm-svn: 26438
2006-03-01 01:11:20 +00:00
53a2d60bca
New vector type v2f32.
...
llvm-svn: 26437
2006-03-01 01:10:52 +00:00
b97aab4371
Vector ops lowering.
...
llvm-svn: 26436
2006-03-01 01:09:54 +00:00
91c574b642
New type v2f32.
...
llvm-svn: 26435
2006-03-01 01:06:22 +00:00
5dc7772620
Missing a cast previously.
...
llvm-svn: 26434
2006-03-01 00:58:54 +00:00
5d5f6f3e32
- Added v2f32, not used by any target currently. Only for testing purpose.
...
- Minor bug fix.
llvm-svn: 26433
2006-03-01 00:55:26 +00:00
be85e89ec4
- Added VConstant as an abstract version of ConstantVec.
...
- All abstrct vector nodes must have # of elements and element type as their
first two operands.
llvm-svn: 26432
2006-03-01 00:51:13 +00:00
2a78abd411
Add a test case for left shift by 1. We should not be using lea for this.
...
llvm-svn: 26431
2006-02-28 23:57:45 +00:00
0e69f45b07
Another entry.
...
llvm-svn: 26430
2006-02-28 23:38:49 +00:00
990c3602bd
Don't match x << 1 to LEAL. It's better to emit x + x.
...
llvm-svn: 26429
2006-02-28 21:13:57 +00:00
716edb9754
Add const, volatile, restrict support.
...
Add array of debug descriptor support.
llvm-svn: 26428
2006-02-28 20:15:07 +00:00
c5b6c9a12a
Fix a regression in a patch from a couple of days ago. This fixes
...
Transforms/InstCombine/2006-02-28-Crash.ll
llvm-svn: 26427
2006-02-28 19:47:20 +00:00
8c5f04d212
new testcase
...
llvm-svn: 26426
2006-02-28 19:46:56 +00:00
c1fa889cde
8 spaces -> tab. Reported by Wink Saville
...
llvm-svn: 26425
2006-02-28 19:12:58 +00:00
408fee7ad4
evan's recent x86 isel improvements have fixed this, though not in the way
...
originally envisioned :)
llvm-svn: 26422
2006-02-28 16:39:56 +00:00
b9f35f06bc
Add a subtarget feature for the stfiwx instruction. I know the G5 has it,
...
but I don't know what other PPC impls do. If someone could update the proc
table, I would appreciate it :)
llvm-svn: 26421
2006-02-28 07:08:22 +00:00
d786b0e033
new testcases
...
llvm-svn: 26420
2006-02-28 06:54:19 +00:00
f0032b350c
Compile:
...
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }
to:
_foo4:
lbz r3,1(r3)
blr
_foo5:
lbz r3,1(r3)
blr
not:
_foo4:
lhz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
_foo5:
lhz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
llvm-svn: 26419
2006-02-28 06:49:37 +00:00
872810da6c
remove implemented item
...
llvm-svn: 26418
2006-02-28 06:36:04 +00:00
bdbc4476d9
Fold "and (LOAD P), 255" -> zextload. This allows us to compile:
...
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
lbz r3, 3(r3)
blr
instead of:
_foo3:
lwz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
and:
unsigned short foo2(float a) { return a; }
as:
_foo2:
fctiwz f0, f1
stfd f0, -8(r1)
lhz r3, -2(r1)
blr
instead of:
_foo2:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
llvm-svn: 26417
2006-02-28 06:35:35 +00:00
0f8a727c49
fold (sra (sra x, c1), c2) -> (sra x, c1+c2)
...
llvm-svn: 26416
2006-02-28 06:23:04 +00:00
b70f141893
Implement rem.ll:test[7-9] and PR712
...
llvm-svn: 26415
2006-02-28 05:49:21 +00:00
3059128d02
new testcases for PR712
...
llvm-svn: 26414
2006-02-28 05:48:56 +00:00
2a7c7b8bab
Simplify some code now that the RHS of a rem can't be 0
...
llvm-svn: 26413
2006-02-28 05:40:55 +00:00
626f96431b
new testcase
...
llvm-svn: 26412
2006-02-28 05:30:48 +00:00
0de4a8d7b7
Rearrange some code, fold "rem X, 0", implementing rem.ll:test6
...
llvm-svn: 26411
2006-02-28 05:30:45 +00:00
9fed5b6122
Add support for output memory constraints.
...
llvm-svn: 26410
2006-02-27 23:45:39 +00:00
6d5c2a0156
Qualify dwarf namespace inside llvm namespace.
...
llvm-svn: 26409
2006-02-27 22:37:23 +00:00
f918ed2e33
readme updates
...
llvm-svn: 26405
2006-02-27 22:08:36 +00:00
bc7a3832e8
Partial enabling of functions.
...
llvm-svn: 26404
2006-02-27 20:37:42 +00:00
ec185f7843
Don't print constant initializers, they may span lines now.
...
llvm-svn: 26403
2006-02-27 20:09:23 +00:00
72b66d6d8a
Supporting multiple compile units.
...
llvm-svn: 26402
2006-02-27 17:27:12 +00:00
22e47b9f4e
Re-orging file.
...
llvm-svn: 26401
2006-02-27 12:43:29 +00:00
6be3d8e0df
Pretty print large struct constants.
...
llvm-svn: 26400
2006-02-27 10:33:53 +00:00
8f2c1021b4
Removed dependency on how operands are printed (want multi-line.)
...
llvm-svn: 26399
2006-02-27 10:29:04 +00:00
d87ea46887
Use -emit-llvm -S to get .ll file output from llvm-gcc
...
llvm-svn: 26397
2006-02-27 05:39:00 +00:00
c7bfed0f7b
Merge two almost-identical pieces of code.
...
Make this code more powerful by using ComputeMaskedBits instead of looking
for an AND operand. This lets us fold this:
int %test23(int %a) {
%tmp.1 = and int %a, 1
%tmp.2 = seteq int %tmp.1, 0
%tmp.3 = cast bool %tmp.2 to int ;; xor tmp1, 1
ret int %tmp.3
}
into: xor (and a, 1), 1
llvm-svn: 26396
2006-02-27 02:38:23 +00:00
a8bd74d5d0
new testcases
...
llvm-svn: 26395
2006-02-27 02:36:19 +00:00
f5c8a0b83f
Fold (A^B) == A -> B == 0
...
and (A-B) == A -> B == 0
llvm-svn: 26394
2006-02-27 01:44:11 +00:00
7422e470f3
New testcases
...
llvm-svn: 26393
2006-02-27 01:43:02 +00:00
ab8164042a
Implement bit propagation through sub nodes, this (re)implements
...
PowerPC/div-2.ll
llvm-svn: 26392
2006-02-27 01:00:42 +00:00
3af2da1f3d
Reenable this
...
llvm-svn: 26391
2006-02-27 01:00:12 +00:00
47ee42829d
remove some completed notes
...
llvm-svn: 26390
2006-02-27 00:39:31 +00:00
a60751dd43
Check RHS simplification before LHS simplification to avoid infinitely looping
...
on PowerPC/small-arguments.ll
llvm-svn: 26389
2006-02-27 00:36:27 +00:00
27220f8958
Just like we use the RHS of an AND to simplify the LHS, use the LHS to
...
simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:
_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr
instead of this:
_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr
llvm-svn: 26388
2006-02-27 00:22:28 +00:00
255ab33177
new testcase
...
llvm-svn: 26387
2006-02-27 00:20:23 +00:00
118ddba929
Add a bunch of missed cases. Perhaps the most significant of which is that
...
assertzext produces zero bits.
llvm-svn: 26386
2006-02-26 23:36:02 +00:00
f78df7c14d
Fold (X|C1)^C2 -> X^(C1|C2) when possible. This implements
...
InstCombine/or.ll:test23.
llvm-svn: 26385
2006-02-26 19:57:54 +00:00
69c68c3c3e
new testcase
...
llvm-svn: 26384
2006-02-26 19:55:30 +00:00
702c1d11b5
Reverting. Didn't realize some developers were embedding constants in their
...
target assembler code gen.
llvm-svn: 26383
2006-02-26 10:16:05 +00:00
877ab55e06
ConstantPoolIndex is now the displacement portion of the address (rather
...
than base).
llvm-svn: 26382
2006-02-26 09:12:34 +00:00
9f9662b86e
Print ConstantPoolSDNode offset field.
...
llvm-svn: 26381
2006-02-26 08:36:57 +00:00
75b8783aaf
Fixed ConstantPoolIndex operand asm print bug. This fixed 2005-07-17-INT-To-FP
...
and 2005-05-12-Int64ToFP.
llvm-svn: 26380
2006-02-26 08:28:12 +00:00
3bb7874dd3
Format large struct constants for readability.
...
llvm-svn: 26379
2006-02-25 12:27:03 +00:00
74de65aacd
New test case: use lea for imul by some constants.
...
llvm-svn: 26378
2006-02-25 10:16:10 +00:00
5c1e1ca29f
lea.ll is XFAIL until we implement convertToThreeAddress.
...
llvm-svn: 26377
2006-02-25 10:15:22 +00:00
77d86ff8fc
* Cleaned up addressing mode matching code.
...
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
they need to be matched before LEA.
llvm-svn: 26376
2006-02-25 10:09:08 +00:00
1c557bfeb5
Updates.
...
llvm-svn: 26375
2006-02-25 10:04:07 +00:00
1fac3b3360
* Allow mul, shl nodes to be codegen'd as LEA (if appropriate).
...
* Add patterns to handle GlobalAddress, ConstantPool, etc.
MOV32ri to materialize these nodes in registers.
ADD32ri to handle %reg + GA, etc.
MOV32mi to handle store GA, etc. to memory.
llvm-svn: 26374
2006-02-25 10:02:21 +00:00
e4a8b74e4f
ConstantPoolIndex is now the displacement field of addressing mode.
...
llvm-svn: 26373
2006-02-25 09:56:50 +00:00
994700101e
Added a common about the need for X86ISD::Wrapper.
...
llvm-svn: 26372
2006-02-25 09:55:19 +00:00
ed169db8a5
Added an offset field to ConstantPoolSDNode.
...
llvm-svn: 26371
2006-02-25 09:54:52 +00:00
b8d9667087
this fails, mark it as such
...
llvm-svn: 26370
2006-02-25 08:18:43 +00:00
7d01f95a57
Fix a bug that Evan exposed with some changes he's making, and that was
...
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).
When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.
llvm-svn: 26369
2006-02-25 02:17:31 +00:00
28a0b8bec7
Remove debugging printout :)
...
Add a minor compile time win, no codegen change.
llvm-svn: 26368
2006-02-25 02:03:40 +00:00
525522e429
Refactor some code from being inline to being out in a new class with methods.
...
This gets rid of two gotos, which is always nice, and also adds some comments.
No functionality change, this is just a refactor.
llvm-svn: 26367
2006-02-25 01:51:33 +00:00
42d5ac557c
Fix an obvious bug exposed when we are doing
...
ADD X, 4
==>
MOV32ri $X+4, ...
llvm-svn: 26366
2006-02-25 01:37:02 +00:00
7674d90fa1
Add memory printing support for PPC. Input memory operands now work with
...
inline asms! :)
llvm-svn: 26365
2006-02-24 20:27:40 +00:00
1d08c6534c
Use the PrintAsmMemoryOperand to print addressing modes.
...
llvm-svn: 26364
2006-02-24 20:21:58 +00:00
d0dadd73a4
Add a PrintAsmMemoryOperand method for printing addresses
...
llvm-svn: 26363
2006-02-24 20:21:12 +00:00
5af3fdec12
Pass all the flags to the asm printer, not just the # operands.
...
llvm-svn: 26362
2006-02-24 19:50:58 +00:00
2f8a794b13
rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope.
...
Add support for addressing modes.
llvm-svn: 26361
2006-02-24 19:18:20 +00:00
86c51000db
Refactor operand adding out to a new AddOperand method
...
llvm-svn: 26358
2006-02-24 18:54:03 +00:00
bbc861543f
add a method
...
llvm-svn: 26357
2006-02-24 18:53:51 +00:00
b580d26e7d
Fix a problem that Nate noticed that boils down to an over conservative check
...
in the code that does "select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y)))".
We now compile this loop:
LBB1_1: ; no_exit
add r6, r2, r3
subf r3, r2, r3
cmpwi cr0, r2, 0
addi r7, r5, 4
lwz r2, 0(r5)
addi r4, r4, 1
blt cr0, LBB1_4 ; no_exit
LBB1_3: ; no_exit
mr r3, r6
LBB1_4: ; no_exit
cmpwi cr0, r4, 16
mr r5, r7
bne cr0, LBB1_1 ; no_exit
into this instead:
LBB1_1: ; no_exit
srawi r6, r2, 31
add r2, r2, r6
xor r6, r2, r6
addi r7, r5, 4
lwz r2, 0(r5)
addi r4, r4, 1
add r3, r3, r6
cmpwi cr0, r4, 16
mr r5, r7
bne cr0, LBB1_1 ; no_exit
llvm-svn: 26356
2006-02-24 18:05:58 +00:00
723d3e0746
Add pointer and reference types. Added short-term code to ignore NULL types
...
(to allow llvm-gcc4 to build.)
llvm-svn: 26355
2006-02-24 16:46:40 +00:00
83c22e0d75
Get VC++ building again.
...
llvm-svn: 26351
2006-02-24 02:52:40 +00:00
dcf785bf46
Implement (most of) selection of inline asm memory operands.
...
llvm-svn: 26350
2006-02-24 02:13:54 +00:00
dc445eadc0
Select inline asm memory operands.
...
llvm-svn: 26349
2006-02-24 02:13:31 +00:00
a1ec1ddd59
Implement selection of inline asm memory operands
...
llvm-svn: 26348
2006-02-24 02:13:12 +00:00
ca3341cac6
Add some hooks for selecting memory addresses.
...
llvm-svn: 26347
2006-02-24 02:12:52 +00:00
7ef7a64ebb
Lower C_Memory operands.
...
llvm-svn: 26346
2006-02-24 01:11:24 +00:00
2a9e1e3e74
Recognize memory operand codes
...
llvm-svn: 26345
2006-02-24 01:10:46 +00:00
db3689ed09
Add C_Memory operand type
...
llvm-svn: 26344
2006-02-24 01:10:14 +00:00
de5a9f4517
Parse the %*# constraint modifiers
...
llvm-svn: 26341
2006-02-23 23:36:53 +00:00
f75c0e50fe
add a new flag
...
llvm-svn: 26340
2006-02-23 23:36:23 +00:00
e5386d4d98
Added basic support for typedefs.
...
llvm-svn: 26339
2006-02-23 22:37:30 +00:00
0ed48fe601
PPC JIT relocation model should be DynamicNoPIC.
...
llvm-svn: 26338
2006-02-23 22:18:07 +00:00
e0ed6ec13f
- Clean up the lowering and selection code of ConstantPool, GlobalAddress,
...
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
mentioned leaf nodes. Do not mutate and nodes and do not record the
selection in CodeGenMap. These nodes should be safe to duplicate. This is
a performance win.
llvm-svn: 26335
2006-02-23 20:41:18 +00:00
e7c0ffb3a0
Fix an endianness problem on big-endian targets with expanded operands
...
to inline asms. Mark some methods const.
llvm-svn: 26334
2006-02-23 20:06:57 +00:00
1bad2546d0
Implement the PPC inline asm "L" modifier. This allows us to compile:
...
long long test(long long X) {
__asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
return X;
}
to:
foo r2 r3 r2 r3
llvm-svn: 26333
2006-02-23 19:31:10 +00:00
571d9647c6
Record all of the expanded registers in the DAG and machine instr, fixing
...
several bugs in inline asm expanded operands.
llvm-svn: 26332
2006-02-23 19:21:04 +00:00
69b9e26186
DwarfWriter reading basic type information from llvm-gcc4 code.
...
llvm-svn: 26331
2006-02-23 16:58:18 +00:00
47b8bb0ca0
Match the case of other mailing lists in the list
...
llvm-svn: 26330
2006-02-23 16:18:29 +00:00
411f0df031
document the llvm-testresults list
...
llvm-svn: 26329
2006-02-23 16:14:22 +00:00
2988921dc4
Code cleanups, no functionality change
...
llvm-svn: 26328
2006-02-23 06:44:17 +00:00
16f08f53b1
"." isn't enough to get a private label on linux, use ".L".
...
llvm-svn: 26327
2006-02-23 05:25:02 +00:00
2bacf981bf
add a small and simple case.
...
llvm-svn: 26326
2006-02-23 05:17:43 +00:00
f4448cee66
A couple of new entries.
...
llvm-svn: 26325
2006-02-23 02:50:21 +00:00
1f342c2884
PIC related bug fixes.
...
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.
llvm-svn: 26324
2006-02-23 02:43:52 +00:00
7eabbfd618
X86 codegen tweak to use lea in another case:
...
Suppose base == %eax and it has multiple uses, then instead of
movl %eax, %ecx
addl $8, %ecx
use
leal 8(%eax), %ecx.
llvm-svn: 26323
2006-02-23 00:13:58 +00:00
94d5466fa1
Add a test case for 'lea'.
...
llvm-svn: 26322
2006-02-23 00:12:12 +00:00
7714a59d91
Missing .globl for weak / link-once .text symbols.
...
llvm-svn: 26321
2006-02-22 23:59:57 +00:00
e5521db5bc
Fix Regression/Transforms/LoopUnswitch/2006-02-22-UnswitchCrash.ll, which
...
caused SPASS to fail building last night.
We can't trivially unswitch a loop if the exit block has phi nodes in it,
because we don't know which predecessor to use.
llvm-svn: 26320
2006-02-22 23:55:00 +00:00
a61d2e8878
new testcase distilled from SPASS
...
llvm-svn: 26319
2006-02-22 23:54:15 +00:00
b1124f3c76
This fixes a couple of problems with expansion
...
llvm-svn: 26318
2006-02-22 23:09:03 +00:00
2e124af406
Don't return registers from register classes that aren't legal.
...
llvm-svn: 26317
2006-02-22 23:00:51 +00:00
6f87d18be9
Change a whole bunch of code to be built around RegsForValue instead of
...
a single register number. This fully implements promotion for inline asms,
expand is close but not quite right yet.
llvm-svn: 26316
2006-02-22 22:37:12 +00:00
73136dfecc
- Added option -relocation-model to set relocation model. Valid values include static, pic,
...
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.
llvm-svn: 26315
2006-02-22 20:19:42 +00:00
2fa33a989d
Coordinate activities with llvm-gcc4 and dwarf.
...
llvm-svn: 26314
2006-02-22 19:02:11 +00:00
50e2638ee7
Make the LLVM headers "-ansi -pedantic -Wno-long-long" clean.
...
Patch by Martin Partel!
llvm-svn: 26313
2006-02-22 16:23:43 +00:00
8bd3e91fa2
Turn on loop unswitching tonight
...
llvm-svn: 26312
2006-02-22 07:33:49 +00:00
8a5a324dac
Add some comments, simplify some code, and fix a bug that caused rewriting
...
to rewrite with the wrong value.
llvm-svn: 26311
2006-02-22 06:37:14 +00:00
9e252e3bcf
Added MMX, SSE1, and SSE2 vector instructions and some simple patterns.
...
Fixed some existing bugs (wrong predicates, prefixes) at the same time.
llvm-svn: 26310
2006-02-22 02:26:30 +00:00
02f92a88b6
reorder some libraries
...
llvm-svn: 26309
2006-02-22 00:59:06 +00:00
7ad77dfc2a
split register class handling from explicit physreg handling.
...
llvm-svn: 26308
2006-02-22 00:56:39 +00:00
cd78df1e85
expose the set of values types holdable in a regclass to clients
...
llvm-svn: 26307
2006-02-21 23:51:58 +00:00
5c79f98f15
Adjust to changes in getRegForInlineAsmConstraint prototype
...
llvm-svn: 26306
2006-02-21 23:12:12 +00:00
7bb4696dc3
Updates to match change of getRegForInlineAsmConstraint prototype
...
llvm-svn: 26305
2006-02-21 23:11:00 +00:00
ebb7489537
Pass in a value type to getRegForInlineAsmConstraint, allowing targets to
...
select different sets of registers depending on the type requested.
llvm-svn: 26304
2006-02-21 23:10:29 +00:00
d58478161f
One more round of reorg so sabre doesn't freak out. :-)
...
llvm-svn: 26303
2006-02-21 20:00:20 +00:00
6fc1162855
A big more cleaning up.
...
llvm-svn: 26302
2006-02-21 19:30:30 +00:00
8711b6bff3
Moving things to their proper places.
...
llvm-svn: 26301
2006-02-21 19:26:52 +00:00
6e595b9fd8
Split instruction info into multiple files, one for each of x87, MMX, and SSE.
...
llvm-svn: 26300
2006-02-21 19:13:53 +00:00
0a08f44704
missed optzn
...
llvm-svn: 26299
2006-02-21 18:29:44 +00:00
747cf60696
The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter
...
instructions are expensive.
llvm-svn: 26298
2006-02-21 18:04:32 +00:00
d57203c0a1
Added separate alias instructions for SSE logical ops that operate on non-packed types.
...
llvm-svn: 26297
2006-02-21 02:24:38 +00:00
afffe63fc1
Added MMX and XMM packed integer move instructions, movd and movq.
...
llvm-svn: 26296
2006-02-21 01:39:57 +00:00
fa57a0add9
Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64.
...
Added generic vector types: VR64 and VR128.
llvm-svn: 26295
2006-02-21 01:38:21 +00:00
43070b7541
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
...
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
llvm-svn: 26294
2006-02-20 22:34:53 +00:00
4547400ae2
Some updates
...
llvm-svn: 26292
2006-02-20 19:58:27 +00:00
301f45cf6f
Fix a problem Nate and Duraid reported where simplifying nodes can cause
...
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.
llvm-svn: 26291
2006-02-20 06:51:04 +00:00
486d1bc5ed
Fix a problem on itanium with memset. The value to set has been promoted to
...
i64 before this code, so zero_ext doesn't work.
llvm-svn: 26290
2006-02-20 06:38:35 +00:00
c2e3a7a4ce
improved support for branch folding, still not enabled.
...
llvm-svn: 26289
2006-02-18 07:57:38 +00:00
d13778eb30
If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take
...
advantage of fisttpll.
llvm-svn: 26288
2006-02-18 07:26:17 +00:00
0add83e969
Fix bugs identified by VC++.
...
llvm-svn: 26287
2006-02-18 03:20:33 +00:00
983ca89714
Add a fold for add that exchanges it with a constant shift if possible, so
...
that the shift may be more easily folded into other operations.
llvm-svn: 26286
2006-02-18 02:43:25 +00:00
19fa8ac938
Implement deletion of dead blocks, currently disabled.
...
llvm-svn: 26285
2006-02-18 02:42:34 +00:00
abac61603f
Add checks to make sure we don't create bogus extend nodes, and fix a bug
...
where we were doing exactly that which was causing failures on x86 and
alpha.
llvm-svn: 26284
2006-02-18 02:40:58 +00:00
70af620709
Added fisttp for fp to int conversion.
...
llvm-svn: 26283
2006-02-18 02:36:28 +00:00
33f4156663
Bump up pattern cost if the resulting instruction is marked
...
usesCustomDAGSchedInserter.
llvm-svn: 26282
2006-02-18 02:33:09 +00:00
06c2e6d1b3
Disable PIC for JIT.
...
llvm-svn: 26281
2006-02-18 01:49:25 +00:00
cb853de534
a previous patch completely disabled trivial unswitching, this fixees it.
...
Thanks to nate for pointing this out :)
llvm-svn: 26280
2006-02-18 01:32:04 +00:00
29f771ba21
initial trivial support for folding branches that have now-constant destinations.
...
llvm-svn: 26279
2006-02-18 01:27:45 +00:00
5caed8a231
Jit does not support PIC yet.
...
llvm-svn: 26278
2006-02-18 00:57:10 +00:00
8e44ff50b0
When unswitching a loop, make sure to update loop info with exit blocks in
...
the right loop.
llvm-svn: 26277
2006-02-18 00:55:32 +00:00
d95665188b
Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll
...
llvm-svn: 26275
2006-02-18 00:33:17 +00:00
88b8e3bb71
new testcase that crashes simplifycfg
...
llvm-svn: 26274
2006-02-18 00:32:44 +00:00
5588de9415
x86 / Darwin PIC support.
...
llvm-svn: 26273
2006-02-18 00:15:05 +00:00
5f99760ae7
Moved PICEnabled to include/llvm/Target/TargetOptions.h
...
llvm-svn: 26272
2006-02-18 00:08:58 +00:00
94a8bd4290
Move PICEnabled declaration here.
...
llvm-svn: 26271
2006-02-18 00:06:03 +00:00
375e1a71cc
Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't
...
exactly the API we wanted to call into. This fixes the crash on crafty last
night.
llvm-svn: 26269
2006-02-17 21:58:01 +00:00
4a717bbbfb
add a new method
...
llvm-svn: 26268
2006-02-17 21:57:00 +00:00
8d0e47a017
A few final (for now) tests
...
llvm-svn: 26267
2006-02-17 21:38:45 +00:00
6aee554aa1
Yet another test
...
llvm-svn: 26266
2006-02-17 21:32:46 +00:00
5e176da364
New tests!
...
llvm-svn: 26265
2006-02-17 21:22:08 +00:00
820bc75b8b
Added documentation for vset and vselect.
...
llvm-svn: 26264
2006-02-17 21:18:08 +00:00
fb5dbadf15
Clean up DemandedBitsAreZero interface
...
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal
llvm-svn: 26263
2006-02-17 19:54:08 +00:00
1d7d611ba4
Fix a nit sabre noticed
...
llvm-svn: 26262
2006-02-17 18:06:19 +00:00
57b3567552
Don't expand sdiv by power of two before legalize, since it will likely
...
generate illegal nodes.
llvm-svn: 26261
2006-02-17 07:26:20 +00:00
07a2677e43
unbreak the build
...
llvm-svn: 26260
2006-02-17 07:09:27 +00:00
593bea73ba
Unbreak x86 be
...
llvm-svn: 26259
2006-02-17 07:01:52 +00:00
baddba41c7
Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty
...
llvm-svn: 26258
2006-02-17 06:39:56 +00:00
42c9e4df6f
Fix a comment sabre noticed :)
...
llvm-svn: 26257
2006-02-17 06:24:31 +00:00
669ad7ea19
A couple new regression tests to make sure we always pattern match the new
...
opcodes on ppc.
llvm-svn: 26256
2006-02-17 06:16:56 +00:00
5965bd19f8
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
...
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
llvm-svn: 26255
2006-02-17 05:43:56 +00:00
9ec392b2aa
Fix another miscompilation exposed by lencode, where we lowered i64->f32
...
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).
llvm-svn: 26254
2006-02-17 04:32:33 +00:00
67c21b6c46
add note about div by power of 2
...
llvm-svn: 26253
2006-02-17 04:20:13 +00:00
0d62ebd13f
Fix bug noticed by VC++.
...
llvm-svn: 26252
2006-02-17 02:12:18 +00:00
ac8b761b62
Inform Visual Studio of deleted file.
...
llvm-svn: 26251
2006-02-17 02:11:34 +00:00
3920ce4d8d
Whoops, didn't mean to check this in yet.
...
llvm-svn: 26250
2006-02-17 00:56:19 +00:00
4a0dc0c8f6
Add a missing and useful pat frag
...
llvm-svn: 26249
2006-02-17 00:51:06 +00:00
6fd136239b
start of some new simplification code, not thoroughly tested, use at your own
...
risk :)
llvm-svn: 26248
2006-02-17 00:31:07 +00:00
b590d3a72b
Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers"
...
issue. Need to do more experiments.
llvm-svn: 26247
2006-02-17 00:04:28 +00:00
7e5496d5fe
Kill the x86 pattern isel. boom.
...
llvm-svn: 26246
2006-02-17 00:03:04 +00:00
db1dbbe8d6
Remove the entry about using movapd for SSE reg-reg moves.
...
llvm-svn: 26245
2006-02-17 00:00:58 +00:00
Chris Lattner