Commit Graph

47 Commits

Author SHA1 Message Date
Evan Cheng c1a1bd18e3 Getting rid uses of evil std::set<>
llvm-svn: 33496
2007-01-25 03:07:27 +00:00
Evan Cheng c0b7366cf9 - Reorg Thumb load / store instructions. Combine each rr and ri pair of
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
  address is not an add, materialize a 0 immediate into a register and use
  it as the offset field.

llvm-svn: 33470
2007-01-23 22:59:13 +00:00
Evan Cheng 1199c2d653 Restructure code a bit to make use of continue (simplifying things). Generalize
the .zerofill directive emission to not be darwin-specific.

llvm-svn: 33365
2007-01-19 19:25:36 +00:00
Lauro Ramos Venancio 75aaf1fa6a Fix section definition.
llvm-svn: 33359
2007-01-19 17:33:22 +00:00
Evan Cheng 10043e215b ARM backend contribution from Apple.
llvm-svn: 33353
2007-01-19 07:51:42 +00:00
Chris Lattner 5cfa5ef912 Fix for ARM weak symbols, patch by Lauro Ramos Venancio!
llvm-svn: 32740
2006-12-21 22:59:58 +00:00
Chris Lattner 1ef9cd400d eliminate static ctors for Statistic objects.
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
Rafael Espindola d7998d0e6d move ExtWeakSymbols to AsmPrinter
llvm-svn: 32648
2006-12-18 03:37:18 +00:00
Rafael Espindola b8ada08b26 .align is in bits
.comm is in bytes
:-(

llvm-svn: 32408
2006-12-10 02:53:14 +00:00
Rafael Espindola d12d2250a7 %progbits not @progbits
llvm-svn: 32376
2006-12-08 22:06:02 +00:00
Rafael Espindola 94f29f129d add \"aw\",@progbits" to ctors and dtors
llvm-svn: 32373
2006-12-08 21:24:58 +00:00
Rafael Espindola 265fa68bd8 fix alignment
llvm-svn: 32337
2006-12-07 22:38:06 +00:00
Bill Wendling 9bfb1e1f29 What should be the last unnecessary <iostream>s in the library.
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
Rafael Espindola 219a796475 make sure that we don't use a common symbol if a section was specified
llvm-svn: 32310
2006-12-07 18:33:58 +00:00
Chris Lattner 700b873130 Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.

llvm-svn: 32279
2006-12-06 17:46:33 +00:00
Rafael Espindola 776abee608 print weak references
llvm-svn: 32276
2006-12-06 13:35:10 +00:00
Chris Lattner 81cf22d873 These asm printers shouldn't use assembly/writer.h
llvm-svn: 32262
2006-12-06 06:13:25 +00:00
Rafael Espindola 2369a024d7 add support for weak linkage
llvm-svn: 32222
2006-12-05 17:00:17 +00:00
Rafael Espindola 5f7ab1b964 implement load effective address similar to the alpha backend
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
2006-11-09 13:58:55 +00:00
Rafael Espindola 708cb60588 initial implementation of addressing mode 2
TODO: fix lea_addri

llvm-svn: 31552
2006-11-08 17:07:32 +00:00
Rafael Espindola ac8668d62f move ARMCondCodeToString to ARMAsmPrinter.cpp
remove unused variables from lowerCall

llvm-svn: 31378
2006-11-02 15:00:02 +00:00
Rafael Espindola 3576405a26 print null values in bss
llvm-svn: 31349
2006-11-01 14:26:44 +00:00
Rafael Espindola ea67b973c2 print common symbols
llvm-svn: 31048
2006-10-19 13:30:40 +00:00
Rafael Espindola 19398ec86e initial implementation of addressing mode 5
llvm-svn: 31002
2006-10-17 18:04:53 +00:00
Rafael Espindola f719c5f43d expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS
llvm-svn: 30987
2006-10-16 21:10:32 +00:00
Chris Lattner a6a570e02f Pass the MachineFunction into EmitJumpTableInfo.
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
Chris Lattner 4431699187 Use getSectionForFunction.
llvm-svn: 30740
2006-10-05 02:49:23 +00:00
Rafael Espindola 3130a756ef add shifts to addressing mode 1
llvm-svn: 30291
2006-09-13 12:09:43 +00:00
Rafael Espindola e45a79a9e2 partial implementation of the ARM Addressing Mode 1
llvm-svn: 30252
2006-09-11 17:25:40 +00:00
Rafael Espindola ecb0d686f8 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization
llvm-svn: 30246
2006-09-11 12:49:38 +00:00
Anton Korobeynikov fbee8bfe48 Removed unnecessary Mangler creation.
llvm-svn: 30239
2006-09-10 21:17:03 +00:00
Jim Laskey 261779bb45 Make target asm info a property of the target machine.
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
Jim Laskey a6211dcdad Separate target specific asm properties from the asm printers.
llvm-svn: 30126
2006-09-06 18:34:40 +00:00
Rafael Espindola 98dc23fd1f use @ for comments
store LR in an arbitrary stack slot
add support for writing varargs functions

llvm-svn: 29876
2006-08-25 17:55:16 +00:00
Rafael Espindola fe03fe9bf4 create a generic bcond instruction that has a conditional code argument
llvm-svn: 29856
2006-08-24 16:13:15 +00:00
Rafael Espindola e08b9853cc initial support for branches
llvm-svn: 29854
2006-08-24 13:45:55 +00:00
Rafael Espindola c3ed77e1b9 add a "load effective address"
llvm-svn: 29748
2006-08-17 17:09:40 +00:00
Rafael Espindola 8b7bd8264b start comments with #
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save

llvm-svn: 29451
2006-08-01 18:53:10 +00:00
Rafael Espindola 95035cf001 implement LowerConstantPool and LowerGlobalAddress
llvm-svn: 29433
2006-08-01 12:58:43 +00:00
Rafael Espindola 7cc2d19fc1 handle GlobalValue::InternalLinkage in doFinalization
llvm-svn: 29417
2006-07-31 20:38:13 +00:00
Rafael Espindola 89e5cbd897 emit global constants
llvm-svn: 29344
2006-07-27 11:38:51 +00:00
Rafael Espindola 75269be065 skeleton of a lowerCall implementation for ARM
llvm-svn: 29159
2006-07-16 01:02:57 +00:00
Rafael Espindola 185c5c2bdf add the memri memory operand
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
2006-07-11 11:36:48 +00:00
Rafael Espindola 87bc1a9b0b On ARM, alignment is in bits
Add lr as a hard coded operand of bx

llvm-svn: 28494
2006-05-26 10:56:17 +00:00
Rafael Espindola 91df1ef41f implement initial version of ARMAsmPrinter::printOperand
llvm-svn: 28470
2006-05-25 12:57:06 +00:00
Rafael Espindola 27f8bdc7e5 implement minimal versions of
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr

llvm-svn: 28431
2006-05-23 02:48:20 +00:00
Rafael Espindola ffdc24b847 added a skeleton of the ARM backend
llvm-svn: 28301
2006-05-14 22:18:28 +00:00