Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly

check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.

llvm-svn: 109854
This commit is contained in:
Eli Friedman 2010-07-30 06:44:31 +00:00
parent 413021a8c7
commit ffe64c06ef
2 changed files with 17 additions and 6 deletions

View File

@ -1968,12 +1968,9 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
EVT ExtDstTy = N0.getValueType();
unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
// If the extended part has any inconsistent bits, it cannot ever
// compare equal. In other words, they have to be all ones or all
// zeros.
APInt ExtBits =
APInt::getHighBitsSet(ExtDstTyBits, ExtDstTyBits - ExtSrcTyBits);
if ((C1 & ExtBits) != 0 && (C1 & ExtBits) != ExtBits)
// If the constant doesn't fit into the number of bits for the source of
// the sign extension, it is impossible for both sides to be equal.
if (C1.getMinSignedBits() > ExtSrcTyBits)
return DAG.getConstant(Cond == ISD::SETNE, VT);
SDValue ZextOp;

View File

@ -0,0 +1,14 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define i32 @extend2bit_v2(i32 %val) {
entry:
%0 = trunc i32 %val to i2 ; <i2> [#uses=1]
%1 = sext i2 %0 to i32 ; <i32> [#uses=1]
%2 = icmp eq i32 %1, 3 ; <i1> [#uses=1]
%3 = zext i1 %2 to i32 ; <i32> [#uses=1]
ret i32 %3
}
; CHECK: extend2bit_v2:
; CHECK: xorl %eax, %eax
; CHECK-NEXT: ret