diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 12185a3d4c38..908a9d8919dd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1968,12 +1968,9 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
       EVT ExtDstTy = N0.getValueType();
       unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
 
-      // If the extended part has any inconsistent bits, it cannot ever
-      // compare equal.  In other words, they have to be all ones or all
-      // zeros.
-      APInt ExtBits =
-        APInt::getHighBitsSet(ExtDstTyBits, ExtDstTyBits - ExtSrcTyBits);
-      if ((C1 & ExtBits) != 0 && (C1 & ExtBits) != ExtBits)
+      // If the constant doesn't fit into the number of bits for the source of
+      // the sign extension, it is impossible for both sides to be equal.
+      if (C1.getMinSignedBits() > ExtSrcTyBits)
         return DAG.getConstant(Cond == ISD::SETNE, VT);
       
       SDValue ZextOp;
diff --git a/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll b/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll
new file mode 100644
index 000000000000..96016cfe1c73
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+
+define i32 @extend2bit_v2(i32 %val) {
+entry:
+  %0 = trunc i32 %val to i2                       ; <i2> [#uses=1]
+  %1 = sext i2 %0 to i32                          ; <i32> [#uses=1]
+  %2 = icmp eq i32 %1, 3                          ; <i1> [#uses=1]
+  %3 = zext i1 %2 to i32                          ; <i32> [#uses=1]
+  ret i32 %3
+}
+
+; CHECK: extend2bit_v2:
+; CHECK: xorl	%eax, %eax
+; CHECK-NEXT: ret