Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.

llvm-svn: 77329
This commit is contained in:
David Goodwin 2009-07-28 17:06:49 +00:00
parent bc79816f28
commit e82862e24e
2 changed files with 29 additions and 1 deletions

View File

@ -715,9 +715,18 @@ defm t2ASR : T2I_sh_ir<"asr", BinOpFrag<(sra node:$LHS, node:$RHS)>>;
defm t2ROR : T2I_sh_ir<"ror", BinOpFrag<(rotr node:$LHS, node:$RHS)>>;
def t2MOVrx : T2sI<(outs GPR:$dst), (ins GPR:$src),
"mov", " $dst, $src, rrx",
"rrx", " $dst, $src",
[(set GPR:$dst, (ARMrrx GPR:$src))]>;
let Defs = [CPSR] in {
def t2MOVsrl_flag : T2XI<(outs GPR:$dst), (ins GPR:$src),
"lsrs.w $dst, $src, #1",
[(set GPR:$dst, (ARMsrl_flag GPR:$src))]>;
def t2MOVsra_flag : T2XI<(outs GPR:$dst), (ins GPR:$src),
"asrs.w $dst, $src, #1",
[(set GPR:$dst, (ARMsra_flag GPR:$src))]>;
}
//===----------------------------------------------------------------------===//
// Bitwise Instructions.
//

View File

@ -0,0 +1,19 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2
define i1 @test1(i64 %poscnt, i32 %work) {
entry:
; CHECK: rrx r0, r0
; CHECK: lsrs.w r1, r1, #1
%0 = lshr i64 %poscnt, 1
%1 = icmp eq i64 %0, 0
ret i1 %1
}
define i1 @test2(i64 %poscnt, i32 %work) {
entry:
; CHECK: rrx r0, r0
; CHECK: asrs.w r1, r1, #1
%0 = ashr i64 %poscnt, 1
%1 = icmp eq i64 %0, 0
ret i1 %1
}