[Hexagon] Handle DBG_VALUE instructions in copy-to-combine
llvm-svn: 257890
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@ -62,6 +62,8 @@ class HexagonCopyToCombine : public MachineFunctionPass {
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bool ShouldCombineAggressively;
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DenseSet<MachineInstr *> PotentiallyNewifiableTFR;
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SmallVector<MachineInstr *, 8> DbgMItoMove;
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public:
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static char ID;
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@ -257,6 +259,9 @@ bool HexagonCopyToCombine::isSafeToMoveTogether(MachineInstr *I1,
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// * reads I2's def reg
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// * or has unmodelled side effects
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// we can't move I2 across it.
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if (I->isDebugValue())
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continue;
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if (isUnsafeToMoveAcross(&*I, I2UseReg, I2DestReg, TRI)) {
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isSafe = false;
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break;
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@ -304,13 +309,19 @@ bool HexagonCopyToCombine::isSafeToMoveTogether(MachineInstr *I1,
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// kill flag for a register (a removeRegisterKilled() analogous to
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// addRegisterKilled) that handles aliased register correctly.
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// * or has a killed aliased register use of I1's use reg
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// %D4<def> = TFRI64 16
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// %R6<def> = TFR %R9
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// %D4<def> = A2_tfrpi 16
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// %R6<def> = A2_tfr %R9
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// %R8<def> = KILL %R8, %D4<imp-use,kill>
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// If we want to move R6 = across the KILL instruction we would have
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// to remove the %D4<imp-use,kill> operand. For now, we are
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// conservative and disallow the move.
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// we can't move I1 across it.
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if (I->isDebugValue()) {
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if (I->readsRegister(I1DestReg, TRI)) // Move this instruction after I2.
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DbgMItoMove.push_back(I);
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continue;
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}
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if (isUnsafeToMoveAcross(I, I1UseReg, I1DestReg, TRI) ||
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// Check for an aliased register kill. Bail out if we see one.
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(!I->killsRegister(I1UseReg) && I->killsRegister(I1UseReg, TRI)))
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@ -344,6 +355,9 @@ HexagonCopyToCombine::findPotentialNewifiableTFRs(MachineBasicBlock &BB) {
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DenseMap<unsigned, MachineInstr *> LastDef;
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for (MachineBasicBlock::iterator I = BB.begin(), E = BB.end(); I != E; ++I) {
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MachineInstr *MI = I;
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if (MI->isDebugValue())
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continue;
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// Mark TFRs that feed a potential new value store as such.
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if(TII->mayBeNewStore(MI)) {
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// Look for uses of TFR instructions.
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@ -364,10 +378,14 @@ HexagonCopyToCombine::findPotentialNewifiableTFRs(MachineBasicBlock &BB) {
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continue;
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// Only close newifiable stores should influence the decision.
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// Ignore the debug instructions in between.
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MachineBasicBlock::iterator It(DefInst);
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unsigned NumInstsToDef = 0;
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while (&*It++ != MI)
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++NumInstsToDef;
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while (&*It != MI) {
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if (!It->isDebugValue())
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++NumInstsToDef;
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*It++;
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}
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if (NumInstsToDef > MaxNumOfInstsBetweenNewValueStoreAndTFR)
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continue;
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@ -419,6 +437,10 @@ bool HexagonCopyToCombine::runOnMachineFunction(MachineFunction &MF) {
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for(MachineBasicBlock::iterator MI = BI->begin(), End = BI->end();
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MI != End;) {
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MachineInstr *I1 = MI++;
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if (I1->isDebugValue())
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continue;
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// Don't combine a TFR whose user could be newified (instructions that
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// define double registers can not be newified - Programmer's Ref Manual
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// 5.4.2 New-value stores).
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@ -430,8 +452,10 @@ bool HexagonCopyToCombine::runOnMachineFunction(MachineFunction &MF) {
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continue;
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// Find a second instruction that can be merged into a combine
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// instruction.
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// instruction. In addition, also find all the debug instructions that
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// need to be moved along with it.
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bool DoInsertAtI1 = false;
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DbgMItoMove.clear();
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MachineInstr *I2 = findPairable(I1, DoInsertAtI1);
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if (I2) {
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HasChanged = true;
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@ -450,6 +474,10 @@ bool HexagonCopyToCombine::runOnMachineFunction(MachineFunction &MF) {
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MachineInstr *HexagonCopyToCombine::findPairable(MachineInstr *I1,
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bool &DoInsertAtI1) {
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MachineBasicBlock::iterator I2 = std::next(MachineBasicBlock::iterator(I1));
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while (I2->isDebugValue())
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++I2;
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unsigned I1DestReg = I1->getOperand(0).getReg();
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for (MachineBasicBlock::iterator End = I1->getParent()->end(); I2 != End;
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@ -478,8 +506,8 @@ MachineInstr *HexagonCopyToCombine::findPairable(MachineInstr *I1,
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// Check that the two instructions are combinable. V4 allows more
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// instructions to be merged into a combine.
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// The order matters because in a TFRI we might can encode a int8 as the
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// hi reg operand but only a uint6 as the low reg operand.
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// The order matters because in a A2_tfrsi we might can encode a int8 as
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// the hi reg operand but only a uint6 as the low reg operand.
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if ((IsI2LowReg && !areCombinableOperations(TRI, I1, I2)) ||
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(IsI1LowReg && !areCombinableOperations(TRI, I2, I1)))
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break;
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@ -535,6 +563,20 @@ void HexagonCopyToCombine::combine(MachineInstr *I1, MachineInstr *I2,
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else
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emitCombineII(InsertPt, DoubleRegDest, HiOperand, LoOperand);
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// Move debug instructions along with I1 if it's being
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// moved towards I2.
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if (!DoInsertAtI1 && DbgMItoMove.size() != 0) {
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// Insert debug instructions at the new location before I2.
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MachineBasicBlock *BB = InsertPt->getParent();
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for (auto NewMI : DbgMItoMove) {
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// If iterator MI is pointing to DEBUG_VAL, make sure
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// MI now points to next relevant instruction.
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if (NewMI == (MachineInstr*)MI)
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++MI;
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BB->splice(InsertPt, BB, NewMI);
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}
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}
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I1->eraseFromParent();
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I2->eraseFromParent();
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}
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