From 9b7320e62193634eae2c15e7f0c91de51ce61926 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Fri, 15 Jan 2016 13:55:57 +0000 Subject: [PATCH] [Hexagon] Handle DBG_VALUE instructions in copy-to-combine llvm-svn: 257890 --- .../Target/Hexagon/HexagonCopyToCombine.cpp | 56 ++++++++++++++++--- 1 file changed, 49 insertions(+), 7 deletions(-) diff --git a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp index 9fd863f6e153..e9e85936540e 100644 --- a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp @@ -62,6 +62,8 @@ class HexagonCopyToCombine : public MachineFunctionPass { bool ShouldCombineAggressively; DenseSet PotentiallyNewifiableTFR; + SmallVector DbgMItoMove; + public: static char ID; @@ -257,6 +259,9 @@ bool HexagonCopyToCombine::isSafeToMoveTogether(MachineInstr *I1, // * reads I2's def reg // * or has unmodelled side effects // we can't move I2 across it. + if (I->isDebugValue()) + continue; + if (isUnsafeToMoveAcross(&*I, I2UseReg, I2DestReg, TRI)) { isSafe = false; break; @@ -304,13 +309,19 @@ bool HexagonCopyToCombine::isSafeToMoveTogether(MachineInstr *I1, // kill flag for a register (a removeRegisterKilled() analogous to // addRegisterKilled) that handles aliased register correctly. // * or has a killed aliased register use of I1's use reg - // %D4 = TFRI64 16 - // %R6 = TFR %R9 + // %D4 = A2_tfrpi 16 + // %R6 = A2_tfr %R9 // %R8 = KILL %R8, %D4 // If we want to move R6 = across the KILL instruction we would have // to remove the %D4 operand. For now, we are // conservative and disallow the move. // we can't move I1 across it. + if (I->isDebugValue()) { + if (I->readsRegister(I1DestReg, TRI)) // Move this instruction after I2. + DbgMItoMove.push_back(I); + continue; + } + if (isUnsafeToMoveAcross(I, I1UseReg, I1DestReg, TRI) || // Check for an aliased register kill. Bail out if we see one. (!I->killsRegister(I1UseReg) && I->killsRegister(I1UseReg, TRI))) @@ -344,6 +355,9 @@ HexagonCopyToCombine::findPotentialNewifiableTFRs(MachineBasicBlock &BB) { DenseMap LastDef; for (MachineBasicBlock::iterator I = BB.begin(), E = BB.end(); I != E; ++I) { MachineInstr *MI = I; + if (MI->isDebugValue()) + continue; + // Mark TFRs that feed a potential new value store as such. if(TII->mayBeNewStore(MI)) { // Look for uses of TFR instructions. @@ -364,10 +378,14 @@ HexagonCopyToCombine::findPotentialNewifiableTFRs(MachineBasicBlock &BB) { continue; // Only close newifiable stores should influence the decision. + // Ignore the debug instructions in between. MachineBasicBlock::iterator It(DefInst); unsigned NumInstsToDef = 0; - while (&*It++ != MI) - ++NumInstsToDef; + while (&*It != MI) { + if (!It->isDebugValue()) + ++NumInstsToDef; + *It++; + } if (NumInstsToDef > MaxNumOfInstsBetweenNewValueStoreAndTFR) continue; @@ -419,6 +437,10 @@ bool HexagonCopyToCombine::runOnMachineFunction(MachineFunction &MF) { for(MachineBasicBlock::iterator MI = BI->begin(), End = BI->end(); MI != End;) { MachineInstr *I1 = MI++; + + if (I1->isDebugValue()) + continue; + // Don't combine a TFR whose user could be newified (instructions that // define double registers can not be newified - Programmer's Ref Manual // 5.4.2 New-value stores). @@ -430,8 +452,10 @@ bool HexagonCopyToCombine::runOnMachineFunction(MachineFunction &MF) { continue; // Find a second instruction that can be merged into a combine - // instruction. + // instruction. In addition, also find all the debug instructions that + // need to be moved along with it. bool DoInsertAtI1 = false; + DbgMItoMove.clear(); MachineInstr *I2 = findPairable(I1, DoInsertAtI1); if (I2) { HasChanged = true; @@ -450,6 +474,10 @@ bool HexagonCopyToCombine::runOnMachineFunction(MachineFunction &MF) { MachineInstr *HexagonCopyToCombine::findPairable(MachineInstr *I1, bool &DoInsertAtI1) { MachineBasicBlock::iterator I2 = std::next(MachineBasicBlock::iterator(I1)); + + while (I2->isDebugValue()) + ++I2; + unsigned I1DestReg = I1->getOperand(0).getReg(); for (MachineBasicBlock::iterator End = I1->getParent()->end(); I2 != End; @@ -478,8 +506,8 @@ MachineInstr *HexagonCopyToCombine::findPairable(MachineInstr *I1, // Check that the two instructions are combinable. V4 allows more // instructions to be merged into a combine. - // The order matters because in a TFRI we might can encode a int8 as the - // hi reg operand but only a uint6 as the low reg operand. + // The order matters because in a A2_tfrsi we might can encode a int8 as + // the hi reg operand but only a uint6 as the low reg operand. if ((IsI2LowReg && !areCombinableOperations(TRI, I1, I2)) || (IsI1LowReg && !areCombinableOperations(TRI, I2, I1))) break; @@ -535,6 +563,20 @@ void HexagonCopyToCombine::combine(MachineInstr *I1, MachineInstr *I2, else emitCombineII(InsertPt, DoubleRegDest, HiOperand, LoOperand); + // Move debug instructions along with I1 if it's being + // moved towards I2. + if (!DoInsertAtI1 && DbgMItoMove.size() != 0) { + // Insert debug instructions at the new location before I2. + MachineBasicBlock *BB = InsertPt->getParent(); + for (auto NewMI : DbgMItoMove) { + // If iterator MI is pointing to DEBUG_VAL, make sure + // MI now points to next relevant instruction. + if (NewMI == (MachineInstr*)MI) + ++MI; + BB->splice(InsertPt, BB, NewMI); + } + } + I1->eraseFromParent(); I2->eraseFromParent(); }