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Bitcode: Correctly compare a Use against itself 

Fix the sort of expected order in the reader to correctly return `false`
when comparing a `Use` against itself.

This was caught by test/Bitcode/binaryIntInstructions.3.2.ll, so I'm
adding a `RUN` line using `llvm-uselistorder` for every test in
`test/Bitcode` that passes.

A few tests still fail, so I'll investigate those next.

This is part of PR5680.

llvm-svn: 214157
This commit is contained in:
Duncan P. N. Exon Smith 2014-07-29 01:13:56 +00:00
parent fee1f5013c
commit 3f0fc7bca9
36 changed files with 38 additions and 0 deletions
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3
llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
View File

@ -106,6 +106,9 @@ static void predictValueUseListOrderImpl(const Value *V, const Function *F,
[&OM, ID](const Entry &L, const Entry &R) {
const Use *LU = L.first;
const Use *RU = R.first;
if (LU == RU)
return false;
auto LID = OM.lookup(LU->getUser()).first;
auto RID = OM.lookup(RU->getUser()).first;
// If ID is 4, then expect: 7 6 5 1 2 3.

1
llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll
View File

@ -1,6 +1,7 @@
; This test ensures that we get a bitcast constant expression in and out,
; not a sitofp constant expression.
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: bitcast (
@G = external global i32

1
llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR4373
@foo = weak global { i32 } zeroinitializer

1
llvm/test/Bitcode/aggregateInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread instructions with aggregate operands

1
llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Tests vclz and vcnt
define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {

1
llvm/test/Bitcode/atomic.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst

1
llvm/test/Bitcode/attributes-3.3.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
; The test checks that LLVM does not silently misread attributes of

1
llvm/test/Bitcode/attributes.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR12696
define void @f1(i8 zeroext)

1
llvm/test/Bitcode/binaryFloatInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary float instructions from

1
llvm/test/Bitcode/binaryIntInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread binary integer instructions from

1
llvm/test/Bitcode/bitwiseInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread bitwise instructions from

1
llvm/test/Bitcode/calling-conventions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread calling conventions of

1
llvm/test/Bitcode/case-ranges-3.3.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
; release of LLVM. This tests that the bitcode for switches from that release

1
llvm/test/Bitcode/cmpxchg-upgrade.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.

1
llvm/test/Bitcode/conversionInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread conversion instructions from

1
llvm/test/Bitcode/drop-debug-info.ll
View File

@ -1,5 +1,6 @@
; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
; RUN: llvm-dis < %t.bc | FileCheck %s
; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
define i32 @main() {
entry:

1
llvm/test/Bitcode/extractelement.ll
View File

@ -1,4 +1,5 @@
; RUN: opt < %s -constprop | llvm-dis -disable-output
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR3465
define double @test() {

1
llvm/test/Bitcode/flags.ll
View File

@ -1,6 +1,7 @@
; RUN: llvm-as < %s | llvm-dis > %t0
; RUN: opt -S < %s > %t1
; RUN: diff %t0 %t1
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; PR6140
; Make sure the flags are serialized/deserialized properly for both

1
llvm/test/Bitcode/function-encoding-rel-operands.ll
View File

@ -1,6 +1,7 @@
; Basic sanity test to check that instruction operands are encoded with
; relative IDs.
; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; CHECK: FUNCTION_BLOCK
; CHECK: INST_BINOP {{.*}}op0=1 op1=1

1
llvm/test/Bitcode/global-variables.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread global variables attributes of

1
llvm/test/Bitcode/inalloca.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; inalloca should roundtrip.

1
llvm/test/Bitcode/linkage-types-3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
; The test checks that LLVM does not silently misread linkage types of

1
llvm/test/Bitcode/memInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread memory related instructions of

1
llvm/test/Bitcode/metadata.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
!llvm.foo = !{!0}
!0 = metadata !{i32 42}

1
llvm/test/Bitcode/ptest-new.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<2 x i64> %bar) nounwind {
entry:

1
llvm/test/Bitcode/ptest-old.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define i32 @foo(<4 x float> %bar) nounwind {
entry:

1
llvm/test/Bitcode/select.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
define <2 x i32> @main() {
ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)

1
llvm/test/Bitcode/shuffle.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis -disable-output
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; <rdar://problem/8622574>
; tests the bitcodereader can handle the case where the reader will initially

1
llvm/test/Bitcode/tailcall.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Check that musttail and tail roundtrip.

1
llvm/test/Bitcode/terminatorInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread terminator instructions from

1
llvm/test/Bitcode/upgrade-global-ctors.ll
View File

@ -1,3 +1,4 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer

1
llvm/test/Bitcode/upgrade-loop-metadata.ll
View File

@ -1,6 +1,7 @@
; Test to make sure loop vectorizer metadata is automatically upgraded.
;
; RUN: llvm-dis < %s.bc | FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
define void @_Z28loop_with_vectorize_metadatav() {
entry:

1
llvm/test/Bitcode/upgrade-tbaa.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
; Function Attrs: nounwind
define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {

1
llvm/test/Bitcode/vectorInstructions.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread vector operations of

1
llvm/test/Bitcode/visibility-styles.3.2.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc| FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not silently misread visibility styles of

1
llvm/test/Bitcode/weak-cmpxchg-upgrade.ll
View File

@ -1,4 +1,5 @@
; RUN: llvm-dis < %s.bc | FileCheck %s
; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
; before the IR change on this file.