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Make CLMUL and AES imply SSE2 since its needed to legalize the type. 

llvm-svn: 155888
This commit is contained in:
Craig Topper 2012-05-01 05:28:32 +00:00
parent 555560c490
commit 29dd148a71
1 changed files with 4 additions and 2 deletions
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6
llvm/lib/Target/X86/X86.td
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@ -87,7 +87,8 @@ def FeatureAVX2 : SubtargetFeature<"avx2", "X86SSELevel", "AVX2",
"Enable AVX2 instructions",
[FeatureAVX]>;
def FeatureCLMUL : SubtargetFeature<"clmul", "HasCLMUL", "true",
"Enable carry-less multiplication instructions">;
"Enable carry-less multiplication instructions",
[FeatureSSE2]>;
def FeatureFMA3 : SubtargetFeature<"fma3", "HasFMA3", "true",
"Enable three-operand fused multiple-add",
[FeatureAVX]>;
@ -100,7 +101,8 @@ def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem",
"HasVectorUAMem", "true",
"Allow unaligned memory operands on vector/SIMD instructions">;
def FeatureAES : SubtargetFeature<"aes", "HasAES", "true",
"Enable AES instructions">;
"Enable AES instructions",
[FeatureSSE2]>;
def FeatureMOVBE : SubtargetFeature<"movbe", "HasMOVBE", "true",
"Support MOVBE instruction">;
def FeatureRDRAND : SubtargetFeature<"rdrand", "HasRDRAND", "true",