From 29dd148a71499dff1bb05b4499481754ca450102 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 1 May 2012 05:28:32 +0000 Subject: [PATCH] Make CLMUL and AES imply SSE2 since its needed to legalize the type. llvm-svn: 155888 --- llvm/lib/Target/X86/X86.td | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 67b59b28d6ca..14b6b246987d 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -87,7 +87,8 @@ def FeatureAVX2 : SubtargetFeature<"avx2", "X86SSELevel", "AVX2", "Enable AVX2 instructions", [FeatureAVX]>; def FeatureCLMUL : SubtargetFeature<"clmul", "HasCLMUL", "true", - "Enable carry-less multiplication instructions">; + "Enable carry-less multiplication instructions", + [FeatureSSE2]>; def FeatureFMA3 : SubtargetFeature<"fma3", "HasFMA3", "true", "Enable three-operand fused multiple-add", [FeatureAVX]>; @@ -100,7 +101,8 @@ def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem", "HasVectorUAMem", "true", "Allow unaligned memory operands on vector/SIMD instructions">; def FeatureAES : SubtargetFeature<"aes", "HasAES", "true", - "Enable AES instructions">; + "Enable AES instructions", + [FeatureSSE2]>; def FeatureMOVBE : SubtargetFeature<"movbe", "HasMOVBE", "true", "Support MOVBE instruction">; def FeatureRDRAND : SubtargetFeature<"rdrand", "HasRDRAND", "true",