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hanchenye-llvm-project/llvm/docs/AMDGPU/gfx7_simm16.rst

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[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-18 01:38:11 +08:00
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.. _amdgpu_synid7_simm16:
imm16
===========================
An :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 16 bits and then sign-extended to 32 bits.