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hanchenye-llvm-project/llvm/test/CodeGen/Mips/trap1.ll

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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
2015-10-15 22:34:23 +08:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=pic
Create a pattern for the "trap" instruction. llvm-svn: 187863
2013-08-07 12:00:26 +08:00
declare void @llvm.trap()
; Function Attrs: nounwind optsize readnone
define i32 @main() {
entry:
call void @llvm.trap()
unreachable
; pic: break 0
ret i32 0
}