This PR adds make rules to get the post-synth RTL out of vivado and build a VCS simulator out of it.
On VCS, a 150ns startup delay is hard-wired on all simulation modes to yield identical waveforms.
The delay is required to initialize vivado gate-level libraries.
Co-authored-by: Nandor Licker <nandorl@sifive.com>
The `target-agnostic.mk` file is a monolith that performs too many tasks at once.
This PR splits it into multiple independent files to delimit the different tasks.
Also moves definitions closer together for clarity. Existing external users of
`target-agnostic.mk` can include the individual splits they are interested in.