fpga-pynq/common
Howard Mao f55bd8e9fc purge icenet related C++ code 2018-07-07 17:37:34 -07:00
..
csrc purge icenet related C++ code 2018-07-07 17:37:34 -07:00
linux-xlnx@6fd59febbf add common linux-xlnx submodule + zc706/zybo dts files 2014-09-21 16:34:28 -07:00
project upgrade to latest RocketChip 2018-04-18 17:49:15 -07:00
scripts Upgrade projects to version 2016.2 2016-08-18 12:43:19 -07:00
src/main/scala shrink the medium config 2018-04-18 17:51:12 -07:00
u-boot-xlnx@f634657334 modify zybo u-boot config to support upstream u-boot-xlnx instead of Digilent repo, add u-boot-xlnx common submodule 2014-09-21 16:12:15 -07:00
Makefrag purge icenet related C++ code 2018-07-07 17:37:34 -07:00
generate-pkg-mk.sh upgrade to latest RocketChip 2018-04-18 17:49:15 -07:00
load_card.sh load sd will load riscv-linux directory if the user chose to download it 2014-09-25 18:22:26 -07:00
make_bitstream.tcl better support for multiple CONFIGs 2015-06-30 12:46:52 -07:00
rocketchip_wrapper.v upgrade to latest RocketChip 2018-04-18 17:49:15 -07:00
zynq_rocketchip.tcl upgrade to latest RocketChip 2018-04-18 17:49:15 -07:00