add common linux-xlnx submodule + zc706/zybo dts files
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6c8a4581f6
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e38729ea18
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@ -7,3 +7,6 @@
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[submodule "common/u-boot-xlnx"]
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path = common/u-boot-xlnx
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url = https://github.com/Xilinx/u-boot-xlnx.git
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[submodule "common/linux-xlnx"]
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path = common/linux-xlnx
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url = https://github.com/Xilinx/linux-xlnx.git
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@ -0,0 +1 @@
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Subproject commit 6fd59febbff1f1a94170d77f6149526286d9bef2
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@ -0,0 +1,428 @@
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/*
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* Device Tree Generator version: 1.1
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*
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* (C) Copyright 2007-2013 Xilinx, Inc.
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* (C) Copyright 2007-2013 Michal Simek
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* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
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*
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* Michal SIMEK <monstr@monstr.eu>
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* Modified for RISC-V Rocket Support by Sagar Karandikar
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*
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* CAUTION: This file is automatically generated by libgen.
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* Version: Xilinx EDK 14.5 EDK_P.58f
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*
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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ethernet0 = &ps7_ethernet_0;
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i2c0 = &ps7_i2c_0;
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serial0 = &ps7_uart_1;
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spi0 = &ps7_qspi_0;
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} ;
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chosen {
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bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
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linux,stdout-path = "/amba@0/serial@e0001000";
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} ;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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ps7_cortexa9_0: cpu@0 {
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bus-handle = <&ps7_axi_interconnect_0>;
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clock-latency = <1000>;
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clocks = <&clkc 3>;
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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interrupt-handle = <&ps7_scugic_0>;
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operating-points = <666667 1000000 333334 1000000 222223 1000000>;
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reg = <0x0>;
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} ;
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ps7_cortexa9_1: cpu@1 {
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bus-handle = <&ps7_axi_interconnect_0>;
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clocks = <&clkc 3>;
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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interrupt-handle = <&ps7_scugic_0>;
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reg = <0x1>;
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} ;
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} ;
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 5 4>, <0 6 4>;
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reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
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reg-names = "cpu0", "cpu1";
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} ;
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ps7_ddr_0: memory@0 {
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device_type = "memory";
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reg = <0x0 0x10000000>;
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} ;
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htif_0: htif@43c00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "generic-uio", "uio", "uio_pdrv";
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reg = <0x43c00000 0x1000>;
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};
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ps7_axi_interconnect_0: amba@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
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ranges ;
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ps7_afi_0: ps7-afi@f8008000 {
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compatible = "xlnx,ps7-afi-1.00.a";
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reg = <0xf8008000 0x1000>;
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} ;
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ps7_afi_1: ps7-afi@f8009000 {
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compatible = "xlnx,ps7-afi-1.00.a";
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reg = <0xf8009000 0x1000>;
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} ;
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ps7_afi_2: ps7-afi@f800a000 {
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compatible = "xlnx,ps7-afi-1.00.a";
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reg = <0xf800a000 0x1000>;
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} ;
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ps7_afi_3: ps7-afi@f800b000 {
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compatible = "xlnx,ps7-afi-1.00.a";
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reg = <0xf800b000 0x1000>;
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} ;
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ps7_ddrc_0: ps7-ddrc@f8006000 {
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compatible = "xlnx,zynq-ddrc-1.0";
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reg = <0xf8006000 0x1000>;
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xlnx,has-ecc = <0x0>;
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} ;
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ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
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clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
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clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
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compatible = "xlnx,zynq-devcfg-1.0";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 8 4>;
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reg = <0xf8007000 0x100>;
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} ;
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ps7_dma_s: ps7-dma@f8003000 {
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <4>;
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clock-names = "apb_pclk";
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clocks = <&clkc 27>;
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compatible = "arm,primecell", "arm,pl330";
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interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
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"dma4", "dma5", "dma6", "dma7";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
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reg = <0xf8003000 0x1000>;
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} ;
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ps7_ethernet_0: ps7-ethernet@e000b000 {
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#address-cells = <1>;
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#size-cells = <0>;
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clock-names = "ref_clk", "aper_clk";
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clocks = <&clkc 13>, <&clkc 30>;
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compatible = "xlnx,ps7-ethernet-1.00.a";
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enet-reset = <&ps7_gpio_0 47 0>;
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 22 4>;
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local-mac-address = [00 0a 35 00 00 00];
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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reg = <0xe000b000 0x1000>;
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xlnx,eth-mode = <0x1>;
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xlnx,has-mdio = <0x1>;
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xlnx,ptp-enet-clock = <111111115>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: phy@7 {
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compatible = "marvell,88e1116r";
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device_type = "ethernet-phy";
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reg = <7>;
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} ;
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} ;
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} ;
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ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
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clocks = <&clkc 4>;
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compatible = "arm,cortex-a9-global-timer";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <1 11 0x301>;
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reg = <0xf8f00200 0x100>;
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} ;
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ps7_gpio_0: ps7-gpio@e000a000 {
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#gpio-cells = <2>;
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clocks = <&clkc 42>;
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compatible = "xlnx,zynq-gpio-1.0";
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emio-gpio-width = <64>;
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gpio-controller ;
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gpio-mask-high = <0x0>;
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gpio-mask-low = <0x0>;
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 20 4>;
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reg = <0xe000a000 0x1000>;
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} ;
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ps7_i2c_0: ps7-i2c@e0004000 {
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clock-frequency = <400000>;
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clocks = <&clkc 38>;
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compatible = "cdns,i2c-r1p10";
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i2c-reset = <&ps7_gpio_0 46 0>;
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 25 4>;
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reg = <0xe0004000 0x1000>;
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xlnx,has-interrupt = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2cswitch@74 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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si570: clock-generator@5d {
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#clock-cells = <0>;
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compatible = "silabs,si570";
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temperature-stability = <50>;
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reg = <0x5d>;
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factory-fout = <156250000>;
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clock-frequency = <148500000>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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eeprom@54 {
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compatible = "at,24c08";
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reg = <0x54>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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gpio@21 {
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compatible = "ti,tca6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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ucd90120@65 {
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compatible = "ti,ucd90120";
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reg = <0x65>;
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};
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};
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};
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} ;
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ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
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compatible = "xlnx,ps7-iop-bus-config-1.00.a";
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reg = <0xe0200000 0x1000>;
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} ;
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ps7_ocmc_0: ps7-ocmc@f800c000 {
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compatible = "xlnx,zynq-ocmc-1.0";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 3 4>;
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reg = <0xf800c000 0x1000>;
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} ;
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ps7_pl310_0: ps7-pl310@f8f02000 {
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arm,data-latency = <3 2 2>;
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arm,tag-latency = <2 2 2>;
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cache-level = <2>;
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cache-unified ;
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compatible = "arm,pl310-cache";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 2 4>;
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reg = <0xf8f02000 0x1000>;
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} ;
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ps7_qspi_0: ps7-qspi@e000d000 {
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clock-names = "ref_clk", "pclk";
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clocks = <&clkc 10>, <&clkc 43>;
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compatible = "xlnx,zynq-qspi-1.0";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 19 4>;
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is-dual = <1>;
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num-cs = <1>;
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reg = <0xe000d000 0x1000>;
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xlnx,fb-clk = <0x1>;
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xlnx,qspi-mode = <0x2>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "n25q128";
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@qspi-fsbl-uboot {
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label = "qspi-fsbl-uboot";
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reg = <0x0 0x100000>;
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};
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partition@qspi-linux {
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label = "qspi-linux";
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reg = <0x100000 0x500000>;
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};
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partition@qspi-device-tree {
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label = "qspi-device-tree";
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reg = <0x600000 0x20000>;
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};
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partition@qspi-rootfs {
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label = "qspi-rootfs";
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reg = <0x620000 0x5E0000>;
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};
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partition@qspi-bitstream {
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label = "qspi-bitstream";
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reg = <0xC00000 0x400000>;
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};
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};
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} ;
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ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
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clock-names = "ref_clk", "aper_clk";
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clocks = <&clkc 10>, <&clkc 43>;
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compatible = "xlnx,ps7-qspi-linear-1.00.a";
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reg = <0xfc000000 0x2000000>;
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} ;
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ps7_scugic_0: ps7-scugic@f8f01000 {
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#address-cells = <2>;
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#interrupt-cells = <3>;
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#size-cells = <1>;
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compatible = "arm,cortex-a9-gic", "arm,gic";
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interrupt-controller ;
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num_cpus = <2>;
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num_interrupts = <96>;
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reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
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} ;
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ps7_scutimer_0: ps7-scutimer@f8f00600 {
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clocks = <&clkc 4>;
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compatible = "arm,cortex-a9-twd-timer";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <1 13 0x301>;
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reg = <0xf8f00600 0x20>;
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} ;
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ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
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clocks = <&clkc 4>;
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compatible = "xlnx,ps7-scuwdt-1.00.a";
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device_type = "watchdog";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <1 14 0x301>;
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reg = <0xf8f00620 0xe0>;
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} ;
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ps7_sd_0: ps7-sdio@e0100000 {
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clock-frequency = <50000000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&clkc 21>, <&clkc 32>;
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compatible = "arasan,sdhci-8.9a";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 24 4>;
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reg = <0xe0100000 0x1000>;
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xlnx,has-cd = <0x1>;
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xlnx,has-power = <0x0>;
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xlnx,has-wp = <0x1>;
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} ;
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ps7_slcr_0: ps7-slcr@f8000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,zynq-slcr", "syscon";
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ranges ;
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reg = <0xf8000000 0x1000>;
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clkc: clkc@100 {
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#clock-cells = <1>;
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clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
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"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
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"lqspi", "smc", "pcap", "gem0", "gem1",
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"fclk0", "fclk1", "fclk2", "fclk3", "can0",
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"can1", "sdio0", "sdio1", "uart0", "uart1",
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"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
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"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
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"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
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"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
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"swdt", "dbg_trc", "dbg_apb";
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compatible = "xlnx,ps7-clkc";
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fclk-enable = <0xf>;
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ps-clk-frequency = <33333333>;
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reg = <0x100 0x100>;
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} ;
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} ;
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ps7_ttc_0: ps7-ttc@f8001000 {
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clocks = <&clkc 6>;
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compatible = "cdns,ttc";
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interrupt-names = "ttc0", "ttc1", "ttc2";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
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reg = <0xf8001000 0x1000>;
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} ;
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ps7_ttc_1: ps7-ttc@f8002000 {
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clocks = <&clkc 6>;
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compatible = "cdns,ttc";
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interrupt-names = "ttc0", "ttc1", "ttc2";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
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reg = <0xf8002000 0x1000>;
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} ;
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ps7_uart_1: serial@e0001000 {
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clock-names = "uart_clk", "pclk";
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clocks = <&clkc 24>, <&clkc 41>;
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compatible = "xlnx,xuartps", "cdns,uart-r1p8";
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current-speed = <115200>;
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device_type = "serial";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 50 4>;
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port-number = <0>;
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reg = <0xe0001000 0x1000>;
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xlnx,has-modem = <0x0>;
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} ;
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ps7_usb_0: ps7-usb@e0002000 {
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clocks = <&clkc 28>;
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compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
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dr_mode = "host";
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interrupt-parent = <&ps7_scugic_0>;
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interrupts = <0 21 4>;
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phy_type = "ulpi";
|
||||
reg = <0xe0002000 0x1000>;
|
||||
usb-reset = <&ps7_gpio_0 7 0>;
|
||||
} ;
|
||||
ps7_wdt_0: ps7-wdt@f8005000 {
|
||||
clocks = <&clkc 45>;
|
||||
compatible = "xlnx,zynq-wdt-r1p2";
|
||||
device_type = "watchdog";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 9 1>;
|
||||
reg = <0xf8005000 0x1000>;
|
||||
reset = <0>;
|
||||
timeout-sec = <10>;
|
||||
} ;
|
||||
ps7_xadc: ps7-xadc@f8007100 {
|
||||
clocks = <&clkc 12>;
|
||||
compatible = "xlnx,zynq-xadc-1.00.a";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 7 4>;
|
||||
reg = <0xf8007100 0x20>;
|
||||
} ;
|
||||
} ;
|
||||
} ;
|
|
@ -0,0 +1,342 @@
|
|||
/*
|
||||
* Device Tree for Zybo board
|
||||
* Partially generated by Device Tree Generator 1.1
|
||||
*
|
||||
* (C) Copyright 2007-2013 Xilinx, Inc.
|
||||
* (C) Copyright 2007-2013 Michal Simek
|
||||
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
|
||||
* (C) Copyright 2014 Digilent, Inc.
|
||||
*
|
||||
* Michal SIMEK <monstr@monstr.eu>
|
||||
* Tinghui Wang <steven.wang@digilentinc.com>
|
||||
* Modified for RISC-V Rocket Support by Sagar Karandikar
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "xlnx,zynq-7000";
|
||||
model = "Xilinx Zynq";
|
||||
aliases {
|
||||
ethernet0 = &ps7_ethernet_0;
|
||||
serial0 = &ps7_uart_1;
|
||||
spi0 = &ps7_qspi_0;
|
||||
} ;
|
||||
chosen {
|
||||
bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
|
||||
linux,stdout-path = "/amba@0/serial@e0001000";
|
||||
} ;
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ps7_cortexa9_0: cpu@0 {
|
||||
bus-handle = <&ps7_axi_interconnect_0>;
|
||||
clock-latency = <1000>;
|
||||
clocks = <&clkc 3>;
|
||||
compatible = "arm,cortex-a9";
|
||||
device_type = "cpu";
|
||||
interrupt-handle = <&ps7_scugic_0>;
|
||||
operating-points = <666667 1000000 333334 1000000 222223 1000000>;
|
||||
reg = <0x0>;
|
||||
} ;
|
||||
ps7_cortexa9_1: cpu@1 {
|
||||
bus-handle = <&ps7_axi_interconnect_0>;
|
||||
clocks = <&clkc 3>;
|
||||
compatible = "arm,cortex-a9";
|
||||
device_type = "cpu";
|
||||
interrupt-handle = <&ps7_scugic_0>;
|
||||
reg = <0x1>;
|
||||
} ;
|
||||
} ;
|
||||
pmu {
|
||||
compatible = "arm,cortex-a9-pmu";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 5 4>, <0 6 4>;
|
||||
reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
|
||||
reg-names = "cpu0", "cpu1";
|
||||
} ;
|
||||
ps7_ddr_0: memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x10000000>;
|
||||
} ;
|
||||
|
||||
htif_0: htif@43c00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "generic-uio", "uio", "uio_pdrv";
|
||||
reg = <0x43c00000 0x1000>;
|
||||
};
|
||||
|
||||
ps7_axi_interconnect_0: amba@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
|
||||
ranges ;
|
||||
ps7_afi_0: ps7-afi@f8008000 {
|
||||
compatible = "xlnx,ps7-afi-1.00.a";
|
||||
reg = <0xf8008000 0x1000>;
|
||||
} ;
|
||||
ps7_afi_1: ps7-afi@f8009000 {
|
||||
compatible = "xlnx,ps7-afi-1.00.a";
|
||||
reg = <0xf8009000 0x1000>;
|
||||
} ;
|
||||
ps7_afi_2: ps7-afi@f800a000 {
|
||||
compatible = "xlnx,ps7-afi-1.00.a";
|
||||
reg = <0xf800a000 0x1000>;
|
||||
} ;
|
||||
ps7_afi_3: ps7-afi@f800b000 {
|
||||
compatible = "xlnx,ps7-afi-1.00.a";
|
||||
reg = <0xf800b000 0x1000>;
|
||||
} ;
|
||||
ps7_ddrc_0: ps7-ddrc@f8006000 {
|
||||
compatible = "xlnx,zynq-ddrc-1.0";
|
||||
reg = <0xf8006000 0x1000>;
|
||||
xlnx,has-ecc = <0x0>;
|
||||
} ;
|
||||
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
|
||||
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
|
||||
clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
|
||||
compatible = "xlnx,zynq-devcfg-1.0";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 8 4>;
|
||||
reg = <0xf8007000 0x100>;
|
||||
} ;
|
||||
ps7_dma_s: ps7-dma@f8003000 {
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
#dma-requests = <4>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&clkc 27>;
|
||||
compatible = "arm,primecell", "arm,pl330";
|
||||
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
|
||||
"dma4", "dma5", "dma6", "dma7";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
|
||||
reg = <0xf8003000 0x1000>;
|
||||
} ;
|
||||
ps7_ethernet_0: ps7-ethernet@e000b000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "ref_clk", "aper_clk";
|
||||
clocks = <&clkc 13>, <&clkc 30>;
|
||||
compatible = "xlnx,ps7-ethernet-1.00.a";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 22 4>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
reg = <0xe000b000 0x1000>;
|
||||
xlnx,eth-mode = <0x1>;
|
||||
xlnx,has-mdio = <0x1>;
|
||||
xlnx,ptp-enet-clock = <108333336>;
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
phy0: phy@1 {
|
||||
compatible = "realtek,RTL8211E";
|
||||
device_type = "ethernet-phy";
|
||||
reg = <1>;
|
||||
} ;
|
||||
} ;
|
||||
} ;
|
||||
ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
|
||||
clocks = <&clkc 4>;
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <1 11 0x301>;
|
||||
reg = <0xf8f00200 0x100>;
|
||||
} ;
|
||||
ps7_gpio_0: ps7-gpio@e000a000 {
|
||||
#gpio-cells = <2>;
|
||||
clocks = <&clkc 42>;
|
||||
compatible = "xlnx,zynq-gpio-1.0";
|
||||
emio-gpio-width = <64>;
|
||||
gpio-controller ;
|
||||
gpio-mask-high = <0xc0000>;
|
||||
gpio-mask-low = <0xfe81>;
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 20 4>;
|
||||
reg = <0xe000a000 0x1000>;
|
||||
} ;
|
||||
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
|
||||
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
|
||||
reg = <0xe0200000 0x1000>;
|
||||
} ;
|
||||
ps7_ocmc_0: ps7-ocmc@f800c000 {
|
||||
compatible = "xlnx,zynq-ocmc-1.0";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 3 4>;
|
||||
reg = <0xf800c000 0x1000>;
|
||||
} ;
|
||||
ps7_pl310_0: ps7-pl310@f8f02000 {
|
||||
arm,data-latency = <3 2 2>;
|
||||
arm,tag-latency = <2 2 2>;
|
||||
cache-level = <2>;
|
||||
cache-unified ;
|
||||
compatible = "arm,pl310-cache";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 2 4>;
|
||||
reg = <0xf8f02000 0x1000>;
|
||||
} ;
|
||||
ps7_qspi_0: ps7-qspi@e000d000 {
|
||||
clock-names = "ref_clk", "pclk";
|
||||
clocks = <&clkc 10>, <&clkc 43>;
|
||||
compatible = "xlnx,zynq-qspi-1.0";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 19 4>;
|
||||
is-dual = <0>;
|
||||
num-cs = <1>;
|
||||
reg = <0xe000d000 0x1000>;
|
||||
xlnx,fb-clk = <0x1>;
|
||||
xlnx,qspi-mode = <0x0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
flash@0 {
|
||||
compatible = "n25q128";
|
||||
reg = <0x0>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <50000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@qspi-fsbl-uboot {
|
||||
label = "qspi-fsbl-uboot";
|
||||
reg = <0x0 0x400000>;
|
||||
};
|
||||
partition@qspi-linux {
|
||||
label = "qspi-linux";
|
||||
reg = <0x400000 0x500000>;
|
||||
};
|
||||
partition@qspi-device-tree {
|
||||
label = "qspi-device-tree";
|
||||
reg = <0x900000 0x20000>;
|
||||
};
|
||||
partition@qspi-user {
|
||||
label = "qspi-user";
|
||||
reg = <0x920000 0x6E0000>;
|
||||
};
|
||||
};
|
||||
|
||||
} ;
|
||||
ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
|
||||
clock-names = "ref_clk", "aper_clk";
|
||||
clocks = <&clkc 10>, <&clkc 43>;
|
||||
compatible = "xlnx,ps7-qspi-linear-1.00.a";
|
||||
reg = <0xfc000000 0x1000000>;
|
||||
} ;
|
||||
ps7_scugic_0: ps7-scugic@f8f01000 {
|
||||
#address-cells = <2>;
|
||||
#interrupt-cells = <3>;
|
||||
#size-cells = <1>;
|
||||
compatible = "arm,cortex-a9-gic", "arm,gic";
|
||||
interrupt-controller ;
|
||||
num_cpus = <2>;
|
||||
num_interrupts = <96>;
|
||||
reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
|
||||
} ;
|
||||
ps7_scutimer_0: ps7-scutimer@f8f00600 {
|
||||
clocks = <&clkc 4>;
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <1 13 0x301>;
|
||||
reg = <0xf8f00600 0x20>;
|
||||
} ;
|
||||
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
|
||||
clocks = <&clkc 4>;
|
||||
compatible = "xlnx,ps7-scuwdt-1.00.a";
|
||||
device_type = "watchdog";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <1 14 0x301>;
|
||||
reg = <0xf8f00620 0xe0>;
|
||||
} ;
|
||||
ps7_sd_0: ps7-sdio@e0100000 {
|
||||
clock-frequency = <50000000>;
|
||||
clock-names = "clk_xin", "clk_ahb";
|
||||
clocks = <&clkc 21>, <&clkc 32>;
|
||||
compatible = "arasan,sdhci-8.9a";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 24 4>;
|
||||
reg = <0xe0100000 0x1000>;
|
||||
xlnx,has-cd = <0x1>;
|
||||
xlnx,has-power = <0x0>;
|
||||
xlnx,has-wp = <0x1>;
|
||||
} ;
|
||||
ps7_slcr_0: ps7-slcr@f8000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "xlnx,zynq-slcr", "syscon";
|
||||
ranges ;
|
||||
reg = <0xf8000000 0x1000>;
|
||||
clkc: clkc@100 {
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
|
||||
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
|
||||
"lqspi", "smc", "pcap", "gem0", "gem1",
|
||||
"fclk0", "fclk1", "fclk2", "fclk3", "can0",
|
||||
"can1", "sdio0", "sdio1", "uart0", "uart1",
|
||||
"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
|
||||
"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
|
||||
"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
|
||||
"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
|
||||
"swdt", "dbg_trc", "dbg_apb";
|
||||
compatible = "xlnx,ps7-clkc";
|
||||
fclk-enable = <0xf>;
|
||||
ps-clk-frequency = <50000000>;
|
||||
reg = <0x100 0x100>;
|
||||
} ;
|
||||
} ;
|
||||
ps7_ttc_0: ps7-ttc@f8001000 {
|
||||
clocks = <&clkc 6>;
|
||||
compatible = "cdns,ttc";
|
||||
interrupt-names = "ttc0", "ttc1", "ttc2";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
|
||||
reg = <0xf8001000 0x1000>;
|
||||
} ;
|
||||
ps7_uart_1: serial@e0001000 {
|
||||
clock-names = "uart_clk", "pclk";
|
||||
clocks = <&clkc 24>, <&clkc 41>;
|
||||
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
|
||||
current-speed = <115200>;
|
||||
device_type = "serial";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 50 4>;
|
||||
port-number = <0>;
|
||||
reg = <0xe0001000 0x1000>;
|
||||
xlnx,has-modem = <0x0>;
|
||||
} ;
|
||||
ps7_usb_0: ps7-usb@e0002000 {
|
||||
clocks = <&clkc 28>;
|
||||
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
|
||||
dr_mode = "host";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 21 4>;
|
||||
phy_type = "ulpi";
|
||||
reg = <0xe0002000 0x1000>;
|
||||
xlnx,usb-reset = "MIO 46";
|
||||
} ;
|
||||
ps7_xadc: ps7-xadc@f8007100 {
|
||||
clocks = <&clkc 12>;
|
||||
compatible = "xlnx,zynq-xadc-1.00.a";
|
||||
interrupt-parent = <&ps7_scugic_0>;
|
||||
interrupts = <0 7 4>;
|
||||
reg = <0xf8007100 0x20>;
|
||||
} ;
|
||||
} ;
|
||||
} ;
|
Loading…
Reference in New Issue