91 lines
3.0 KiB
Markdown
91 lines
3.0 KiB
Markdown
# The Abstract Machine (AM)
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## Get Started for Memory Images (Workloads)
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In this section, we demonstrate how to build memory images (`base_address = 0x80000000`) for simulation.
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- clone `nexus-am` from github:
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``` shell
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git clone https://github.com/OpenXiangShan/nexus-am.git
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cd nexus-am
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```
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- enter tests or benchmark directory (using `apps/coremark` as an example):
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```
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cd apps/coremark
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make ARCH=riscv64-xs
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ls ./build # you will see .bin, .txt, *,elf
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```
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- use the ".bin" file as the memory image for RTL simulation
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Here we use the DiffTest RTL-simulation framework as an example.
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NEMU and other designs should work similarly if the base address is 0x8000_0000.
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```
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$NOOP_HOME/build/emu -i ./build/coremark-riscv64-xs.bin
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```
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## How to build benchmark flash image
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Some designs have a read-only bootrom for bring-up.
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This section builds the bootrom (flash) image whose base address is 0x1000_0000.
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We will be using `riscv64-xs-flash` instead of `riscv64-xs` to fix into the new address space.
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Do NOT follow the steps in this section if you don't know what the bootrom means.
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- enter benchmark directory (using `apps/coremark` as an example):
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```
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cd /apps/coremark
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make ARCH=riscv64-xs-flash
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ls ./build
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```
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- you will find a ".bin" file, this is a benchmark image for flash
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- to add the flash image to simulation in DiffTest, you can use the `-F` option:
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```
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$NOOP_HOME/build/emu -F ./build/coremark-riscv64-xs-flash.bin
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```
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## Explanation of multi-processor bring-up drivers
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The driver consists of the following functions (implemented in am/src/xs/isa/riscv/mpe.c) :
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* `_mpe_init(void (*entry)())`: register an `entry` procedure that each processor will run into after initialization
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* `_ncpu()`: return the total number of processors
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* `_cpu()`: return the hartID of current processor (start from 0)
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* `_atomic_xchg(intptr_t *addr, intptr_t newval)`: atomic exchange function，replace the value in *addr with newval and return the original value
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* `_atomic_add(intptr_t *addr, intptr_t adder) `: atomic adding function，increment value in *addr with adder and return the original value
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* `_barrier()`: barrier function，wait until all processors arrive here
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(For more atomic operations, You can implement it yourself using a similar format as _atomic_add)
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A simple demo is provided in tests/amtest/src/tests/mp.c Here is the instruction to build and run
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```shell
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cd nexus-am
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make ARCH=riscv64-xs-dual mainargs='m2'
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# Here m means multi-processor demo, 2 means dual core
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$(PATH_OF_DUALCORE_XS)/build/emu -i build/amtest-riscv64-xs-dual.bin --diff=$(PATH_OF_DUALCORE_XS)/ready-to-run/riscv64-nemu-interpreter-dual-so
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```
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The output should be like this:
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```shell
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My CPU ID is 0, nrCPU is 2
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My CPU ID is 1, nrCPU is 2
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sum = 193 atomic_sum = 200
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Finalize CPU ID: 1
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sum = 193 atomic_sum = 200
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Finalize CPU ID: 0
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```
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Note that both `sum` and `atomic_sum` are incremented 100 times per CPU parallelly. However, `atomic_sum` utilizes atomic primitive. Thus, we have `sum` <= 200 && `atomic_sum` == 200.
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