Commit Graph

884 Commits

Author SHA1 Message Date
wangkaifan a09e3a50df am,mpe: add init_tls in _mpe_init 2022-04-22 21:12:30 +08:00
wangkaifan 43cad0ab42 am,amtest,mpe: support atomic_add and barrier 2022-04-22 21:04:15 +08:00
wangkaifan e35b4eadff am,riscv,mpe: support basic MPE for xs-dualcore
* add two extra APIs for mpe: _mpe_setncpu & _mpe_wakeup
* implement all mpe APIs
* add new linker scripts and start assembly
2022-04-21 19:31:31 +08:00
wangkaifan e3e3f4d37f xs,am: add xsextra as supplementary test API specified for xs test suit
* Thus, no need to implement APIs in xsextra for nemu,qemu,native,etc.
2022-04-20 09:21:31 +08:00
Jin Yue 8d0c11d238 add default load image 2022-04-13 16:26:13 +08:00
Jin Yue 2f5a8e0e7a Merge branch 'flash-fetch' 2022-04-13 12:24:19 +08:00
Jin Yue f77320c90b update riscv64-xs-flash ARCH makefile
* use link script in am/src/nemu/isa/riscv/boot/loaderflash.ld
* start_flash.S add pmp disable ram executable
* trm_flash.c add copy_data() and init_bss() functions
2022-04-13 12:12:48 +08:00
JinYue 5ee00bd63a app/loader: add simple boot program 2022-02-04 22:55:36 +08:00
ZhangZifei 4b8f6f2512 update amtest.external interrupt test 2021-11-17 00:21:49 +08:00
JinYue 33250c6e47 Add test for flash instruction fetch 2021-10-27 19:26:58 +08:00
LinJiawei e800de3b0e update coremark 2021-09-26 18:17:18 +08:00
Yinan Xu c51b4f68a7 extintr: fix clear external interrupt logic 2021-09-26 17:55:08 +08:00
William Wang cf543cf376 arch: support riscv64-nutshell
Note: riscv64-nutshell master branch does not support F & D,
its start.S is different from other riscv64 archs
2021-07-14 16:17:13 +08:00
wangkaifan cc63cdcec2 misc: support xs machine 2021-06-16 14:30:21 +08:00
William Wang 6fcb71ebba amtest,extintr: add naive plic init, fix mip write 2021-06-04 18:25:41 +08:00
William Wang 5588560fce Makefile: update xs emu-run command 2021-06-04 14:57:29 +08:00
Yinan Xu 02f85932c3 amtest: add test for external interrupts
This commit adds a test for external interrupts. The test uses
AXI4IntrGenerator in XiangShan to generate external interrupts.
Since XiangShan does not support external supervisor interrupts, we detect
external interrupts in M mode and pass it to S mode via sip.seip.
2021-05-27 09:07:09 +08:00
LinJiawei 04fe5a7498 enable fpu 2021-01-10 12:06:11 +08:00
Yinan Xu eb04f7e38e am: set memory size to 1GB 2021-01-10 11:52:53 +08:00
Yinan Xu 9b24c9ca30 cte: enable/disable sip 2020-07-22 09:52:35 +08:00
Zihao Yu 1a6c4c3cdd dummy: add dummy devices 2020-07-10 20:29:34 +08:00
Zihao Yu c61900dce9 riscv64-noop: adapt to new MMIO address space 2020-07-09 16:53:03 +08:00
Zihao Yu 2695bb1d18 am: add dummy audio for platform without audio device 2020-07-06 14:21:48 +08:00
Zihao Yu 63f9d3784f Merge branch 'jyy-upstream' into 'master'
Jyy upstream

See merge request projectn/nexus-am!43
2020-04-24 20:30:58 +08:00
Zihao Yu f47f582b59 *-nemu,ioe: add audio 2020-04-24 19:28:11 +08:00
Zihao Yu dacc04cacc native,devices,audio: add init register 2020-04-23 21:05:58 +08:00
Zihao Yu 43d6cf558d native,devices,audio: add missing files 2020-04-23 20:29:23 +08:00
Zihao Yu 55b6b17140 native,devices,audio: modify the buffer size to match the one in fceux
* this fixed the delay
2020-04-23 20:08:18 +08:00
Zihao Yu bf9ef5524c native,devices,audio: modify ctl.wait to wait until there are enough space
* instead of waiting for a totally free buffer
2020-04-23 20:03:14 +08:00
Zihao Yu 7ac68fa3e2 native,devices,audio: add SBSTAT register
* this can expose the status of the stream buffer to applications
2020-04-23 20:00:48 +08:00
Zihao Yu 94601b1cb2 native,ioe: add audio and audio test 2020-04-23 09:22:24 +08:00
Zihao Yu 7bd9feb1f1 am: add riscv64-sdi 2020-04-22 16:44:12 +08:00
Zihao Yu d9607b87fa add riscv32-noop 2020-04-21 11:52:04 +08:00
Zihao Yu 90891b4b3e riscv64-nemu,cte: fix wrong store instruction in trap.S 2020-03-25 09:18:26 +08:00
Zihao Yu efd6858b10 am,sdi: use the rv64 engine in NEMU and add more isa 2020-03-25 09:14:40 +08:00
Zihao Yu e1f877d265
Merge pull request #99 from jiangyy/native-memfd
native,platform: use memfd_create() instead of shm_open()
2020-03-15 17:58:28 +08:00
Zihao Yu e548ff3251 am,arch,native: add rule for gdb 2020-03-15 17:41:56 +08:00
Zihao Yu 8036698100 native,platform: use memfd_create() instead of shm_open()
* memfd_create() is automatically released by the kernel, and it does
  not create any files on the filesystem
2020-03-15 17:04:41 +08:00
Zihao Yu 853cdee508 native,platform: fix wrong assert 2020-03-15 16:00:25 +08:00
Zihao Yu 73c903c618 x86-sdi: one-key run 2020-03-12 21:10:09 +08:00
Zihao Yu b144277262 x86-sdi: add dummy cte and vme to compile amtest 2020-03-12 21:09:33 +08:00
Zihao Yu 6960c1ccba add x86-sdi 2020-03-10 17:13:30 +08:00
Zihao Yu c297b3bce5 riscv64-nemu,cte: set PMP before entering S-mode 2020-03-10 17:10:12 +08:00
Zihao Yu f766872d7d riscv64-noop,trm: support mainargs 2020-03-07 21:12:53 +08:00
Zihao Yu 77ecbf5269 remove stale riscv32-noop 2020-03-07 20:58:41 +08:00
Zihao Yu 064fac47bb *-nemu,vme: zero page allocated from OS 2020-03-07 20:53:38 +08:00
Zihao Yu 81065463f0 riscv64-noop: flush TLB after switching address space 2020-03-07 20:40:06 +08:00
Zihao Yu 88d77a74a6 riscv64-noop: flush icache when returning from interrupt
* since AM does not know whether OS loads some code or not
2020-03-07 20:37:03 +08:00
Zihao Yu 70056864f7 riscv64-noop: reuse cte and vme from riscv64-nemu 2020-03-07 20:28:52 +08:00
Zihao Yu 6eafb5797a riscv64: use gnu toolchain 2020-03-07 19:54:37 +08:00