extintr: fix clear external interrupt logic
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cf543cf376
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c51b4f68a7
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@ -24,6 +24,8 @@ _Context* __am_irq_handle(_Context *c) {
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ev.event = _EVENT_IRQ_TIMER; break;
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// SEIP, which is set at mtime.S
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case 0x9 | INTR_BIT:
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// WARNING: this has no effect since in S mode only SSIP can be cleared.
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// It's not deleted because we want to test sip write mask.
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asm volatile ("csrwi sip, 0");
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ev.event = _EVENT_IRQ_IODEV; break;
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case 9:
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@ -47,6 +47,9 @@ is_illegal:
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# the supervisor tries to write mie (enable mie.meie).
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li a3, 0x800
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csrs mie, a3
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# clear the supervisor external interrupt
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li a3, 0x200
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csrc mip, a3
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csrr a3, mepc
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addi a3, a3, 4
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csrw mepc, a3
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@ -19,9 +19,11 @@
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#define SET_INTR(i) WRITE_WORD(INTR_REG_INDEX(i), SET_BIT(READ_INTR_REG(INTR_REG_INDEX(i)), INTR_REG_OFFSET(i)))
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#define PLIC_BASE_ADDR (0x3c000000UL)
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#define PLIC_PRIORITY (PLIC_BASE_ADDR + 0x4UL)
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#define PLIC_PENDING (PLIC_BASE_ADDR + 0x1000UL)
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#define PLIC_ENABLE (PLIC_BASE_ADDR + 0x2000UL)
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#define PLIC_CLAIM (PLIC_BASE_ADDR + 0x200004UL)
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// External interrupts start with index PLIC_EXT_INTR_OFFSET
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#define PLIC_EXT_INTR_OFFSET 2
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#define MAX_EXT_INTR 150
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@ -30,18 +32,26 @@ static volatile uint32_t should_claim = -1;
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void do_ext_intr() {
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uint32_t claim = READ_WORD(PLIC_CLAIM);
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printf("ext_intr: claim %d should_claim %d\n", claim, should_claim);
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// printf("DO_EXT_INTR: claim %d should_claim %d\n", claim, should_claim);
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if (claim) {
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assert(claim == should_claim);
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CLEAR_INTR(claim - 1);
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if (claim != should_claim) {
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printf("ERROR: is the external interrupt bit in PLIC cleared correctly?\n");
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assert(0);
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}
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CLEAR_INTR(claim - PLIC_EXT_INTR_OFFSET);
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WRITE_WORD(PLIC_CLAIM, claim);
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if (READ_WORD(PLIC_CLAIM) != 0) {
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printf("ERROR: do you clear the external interrupt source correctly?\n");
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assert(0);
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}
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should_claim = -1;
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// simply write to mie to trigger an illegal instruction exception
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// m mode will set mie to enable meip
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asm volatile("csrs mie, 0");
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}
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else {
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read_key();
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printf("ERROR: no claim?\n");
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_halt(1);
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}
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}
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@ -59,11 +69,9 @@ _Context *external_trap(_Event ev, _Context *ctx) {
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return ctx;
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}
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static void plic_intr_init()
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{
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// TODO: fix init plic priority logic
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for (int i = 1; i <= MAX_EXT_INTR; i++)
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WRITE_WORD(PLIC_BASE_ADDR + i*sizeof(uint32_t), 0xffffffff);
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static void plic_intr_init() {
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for (int i = 0; i < MAX_EXT_INTR; i++)
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WRITE_WORD(PLIC_PRIORITY + i * sizeof(uint32_t), 0x1);
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}
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void external_intr() {
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@ -72,12 +80,10 @@ void external_intr() {
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asm volatile("csrs sstatus, 2");
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plic_intr_init();
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// trigger interrupts
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const uint32_t MAX_RAND_ITER = 500;
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int r = 0;
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const uint32_t MAX_RAND_ITER = 1000;
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for (int i = 0; i < MAX_RAND_ITER; i++) {
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// int r = rand();
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should_claim = (r % MAX_EXT_INTR) + PLIC_EXT_INTR_OFFSET;
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printf("should_claim %d, setting intr\n", should_claim);
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should_claim = (rand() % MAX_EXT_INTR) + PLIC_EXT_INTR_OFFSET;
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// printf("should_claim %d, setting intr\n", should_claim);
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WRITE_WORD(PLIC_ENABLE + (should_claim / 32) * 4, (1UL << (should_claim % 32)));
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SET_INTR(should_claim - PLIC_EXT_INTR_OFFSET);
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int counter = 0;
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@ -85,10 +91,9 @@ void external_intr() {
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counter++;
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}
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if (should_claim != -1) {
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printf("external interrupt is not triggered!\n");
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printf("external interrupt %d is not triggered!\n", should_claim);
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_halt(1);
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}
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r++;
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}
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printf("external interrupt test passed!!!\n");
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}
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