mirror of https://github.com/n-hys/msun.git
231 lines
5.1 KiB
C
231 lines
5.1 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <machine/npx.h>
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#define __fenv_static
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#include "fenv.h"
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#ifdef __GNUC_GNU_INLINE__
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#error "This file must be compiled with C99 'inline' semantics"
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#endif
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const fenv_t __fe_dfl_env = {
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__INITIAL_NPXCW__,
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0x0000,
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0x0000,
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0x1f80,
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0xffffffff,
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{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
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};
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enum __sse_support __has_sse =
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#ifdef __SSE__
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__SSE_YES;
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#else
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__SSE_UNK;
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#endif
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#define getfl(x) __asm __volatile("pushfl\n\tpopl %0" : "=mr" (*(x)))
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#define setfl(x) __asm __volatile("pushl %0\n\tpopfl" : : "g" (x))
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#define cpuid_dx(x) __asm __volatile("pushl %%ebx\n\tmovl $1, %%eax\n\t" \
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"cpuid\n\tpopl %%ebx" \
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: "=d" (*(x)) : : "eax", "ecx")
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/*
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* Test for SSE support on this processor. We need to do this because
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* we need to use ldmxcsr/stmxcsr to get correct results if any part
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* of the program was compiled to use SSE floating-point, but we can't
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* use SSE on older processors.
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*/
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int
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__test_sse(void)
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{
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int flag, nflag;
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int dx_features;
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/* Am I a 486? */
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getfl(&flag);
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nflag = flag ^ 0x200000;
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setfl(nflag);
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getfl(&nflag);
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if (flag != nflag) {
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/* Not a 486, so CPUID should work. */
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cpuid_dx(&dx_features);
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if (dx_features & 0x2000000) {
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__has_sse = __SSE_YES;
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return (1);
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}
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}
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__has_sse = __SSE_NO;
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return (0);
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}
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extern inline int feclearexcept(int __excepts);
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extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts);
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int
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fesetexceptflag(const fexcept_t *flagp, int excepts)
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{
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fenv_t env;
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__uint32_t mxcsr;
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__fnstenv(&env);
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env.__status &= ~excepts;
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env.__status |= *flagp & excepts;
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__fldenv(&env);
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if (__HAS_SSE()) {
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__stmxcsr(&mxcsr);
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mxcsr &= ~excepts;
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mxcsr |= *flagp & excepts;
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__ldmxcsr(&mxcsr);
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}
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return (0);
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}
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int
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feraiseexcept(int excepts)
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{
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fexcept_t ex = excepts;
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fesetexceptflag(&ex, excepts);
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__fwait();
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return (0);
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}
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extern inline int fetestexcept(int __excepts);
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extern inline int fegetround(void);
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extern inline int fesetround(int __round);
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int
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fegetenv(fenv_t *envp)
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{
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__uint32_t mxcsr;
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__fnstenv(envp);
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/*
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* fnstenv masks all exceptions, so we need to restore
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* the old control word to avoid this side effect.
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*/
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__fldcw(&envp->__control);
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if (__HAS_SSE()) {
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__stmxcsr(&mxcsr);
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__set_mxcsr(*envp, mxcsr);
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}
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return (0);
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}
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int
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feholdexcept(fenv_t *envp)
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{
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__uint32_t mxcsr;
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__fnstenv(envp);
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__fnclex();
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if (__HAS_SSE()) {
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__stmxcsr(&mxcsr);
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__set_mxcsr(*envp, mxcsr);
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mxcsr &= ~FE_ALL_EXCEPT;
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mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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__ldmxcsr(&mxcsr);
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}
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return (0);
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}
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extern inline int fesetenv(const fenv_t *__envp);
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int
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feupdateenv(const fenv_t *envp)
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{
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__uint32_t mxcsr;
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__uint16_t status;
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__fnstsw(&status);
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if (__HAS_SSE())
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__stmxcsr(&mxcsr);
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else
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mxcsr = 0;
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fesetenv(envp);
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feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
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return (0);
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}
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int
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__feenableexcept(int mask)
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{
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__uint32_t mxcsr, omask;
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__uint16_t control;
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mask &= FE_ALL_EXCEPT;
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__fnstcw(&control);
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if (__HAS_SSE())
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__stmxcsr(&mxcsr);
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else
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mxcsr = 0;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control &= ~mask;
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__fldcw(&control);
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if (__HAS_SSE()) {
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mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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__ldmxcsr(&mxcsr);
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}
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return (omask);
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}
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int
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__fedisableexcept(int mask)
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{
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__uint32_t mxcsr, omask;
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__uint16_t control;
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mask &= FE_ALL_EXCEPT;
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__fnstcw(&control);
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if (__HAS_SSE())
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__stmxcsr(&mxcsr);
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else
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mxcsr = 0;
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omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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control |= mask;
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__fldcw(&control);
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if (__HAS_SSE()) {
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mxcsr |= mask << _SSE_EMASK_SHIFT;
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__ldmxcsr(&mxcsr);
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}
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return (omask);
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}
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__weak_reference(__feenableexcept, feenableexcept);
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__weak_reference(__fedisableexcept, fedisableexcept);
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