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SDL_TriggerBreakppoint for riscv arch (both 32/64) version. 

`ebreak` acts like int3 for x86, giving control of running process to debuggers.
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David CARLIER 2023-08-13 13:54:07 +01:00 committed by Ryan C. Gordon
parent ec0042081e
commit 723bcd0a8b
1 changed files with 2 additions and 0 deletions
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2
include/SDL3/SDL_assert.h
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@ -64,6 +64,8 @@ assert can have unique static variables associated with it.
#define SDL_TriggerBreakpoint() __builtin_debugtrap()
#elif (defined(__GNUC__) || defined(__clang__)) && (defined(__i386__) || defined(__x86_64__))
#define SDL_TriggerBreakpoint() __asm__ __volatile__ ( "int $3\n\t" )
#elif (defined(__GNUC__) || defined(__clang__)) && defined(__riscv)
#define SDL_TriggerBreakpoint() __asm__ __volatile__ ( "ebreak\n\t" )
#elif ( defined(__APPLE__) && (defined(__arm64__) || defined(__aarch64__)) ) /* this might work on other ARM targets, but this is a known quantity... */
#define SDL_TriggerBreakpoint() __asm__ __volatile__ ( "brk #22\n\t" )
#elif defined(__APPLE__) && defined(__arm__)