From bd275f2f2a44d8b18dbb2c784e4b2a30edd10ce5 Mon Sep 17 00:00:00 2001 From: Huang_Yuqing Date: Fri, 30 Apr 2021 16:00:51 +0800 Subject: [PATCH 1/2] Remove useless codes, supplementary license and descriptions clearer --- arch/arm/cortex-m4/boot.S | 13 ++++++++++++- arch/arm/cortex-m4/interrupt_vector.S | 13 ++++++++++++- arch/arm/cortex-m4/mpu.c | 1 - arch/arm/cortex-m4/mpu.h | 1 - arch/arm/cortex-m4/svc_entry.S | 1 - arch/arm/cortex-m4/svc_handle.c | 7 +------ arch/arm/cortex-m4/svc_handle.h | 11 ----------- arch/arm/shared/prepare_ahwstack.c | 3 --- arch/kswitch.h | 11 +++++++++++ kernel/include/xs_ktask.h | 1 - 10 files changed, 36 insertions(+), 26 deletions(-) diff --git a/arch/arm/cortex-m4/boot.S b/arch/arm/cortex-m4/boot.S index 8c7adcaf..fe52785d 100644 --- a/arch/arm/cortex-m4/boot.S +++ b/arch/arm/cortex-m4/boot.S @@ -42,13 +42,24 @@ */ /** -* @file coreclock.c +* @file boot.S * @brief derived from ST standard peripheral library * @version 1.0 * @author AIIT XUOS Lab * @date 2021-04-25 */ +/************************************************* +File name: boot.S +Description: Reset and init function +Others: +History: +1. Date: 2021-04-29 +Author: AIIT XUOS Lab +Modification: +1. take startup_stm32f407xx.s for XiUOS +*************************************************/ + .syntax unified .cpu cortex-m4 .fpu softvfp diff --git a/arch/arm/cortex-m4/interrupt_vector.S b/arch/arm/cortex-m4/interrupt_vector.S index b0619f3c..edf2ab23 100644 --- a/arch/arm/cortex-m4/interrupt_vector.S +++ b/arch/arm/cortex-m4/interrupt_vector.S @@ -42,13 +42,24 @@ */ /** -* @file coreclock.c +* @file interrupt_vector.S * @brief derived from ST standard peripheral library * @version 1.0 * @author AIIT XUOS Lab * @date 2021-04-25 */ +/************************************************* +File name: interrupt_vector.S +Description: Interrupt Vectors +Others: +History: +1. Date: 2021-04-29 +Author: AIIT XUOS Lab +Modification: +1. take startup_stm32f407xx.s for XiUOS +*************************************************/ + .globl InterruptVectors /****************************************************************************** diff --git a/arch/arm/cortex-m4/mpu.c b/arch/arm/cortex-m4/mpu.c index 7db4e8a6..0eecba01 100644 --- a/arch/arm/cortex-m4/mpu.c +++ b/arch/arm/cortex-m4/mpu.c @@ -117,7 +117,6 @@ int8_t MpuAddRegion(void *task_mpu, x_base addr , size_t size , uint8_t type) l2size = MpuLog2Ceil(size); addr = MPU_ALIGN(addr , 1 << l2size ); - // KPrintf( "region:%d , size : 0x%08x, l2size: %d , mpu_size : 0x%08x \n",region, size, l2size , MPU_RASR_REGION_SIZE(l2size) ); mpu->region[region].config.rasr = flag |MPU_RASR_REGION_SIZE(l2size) | MPU_ENABLE; mpu->region[region].config.rbar = addr | MPU_RBAR_VALID | region ; //rbar must set region number diff --git a/arch/arm/cortex-m4/mpu.h b/arch/arm/cortex-m4/mpu.h index a200ad25..3f3d50b6 100644 --- a/arch/arm/cortex-m4/mpu.h +++ b/arch/arm/cortex-m4/mpu.h @@ -26,7 +26,6 @@ #define MPU_MAX_REGION_NUM 8 -#define MPU_SYS_REGION_RESERVER 8 /* MPU Control Register Bit Definitions */ diff --git a/arch/arm/cortex-m4/svc_entry.S b/arch/arm/cortex-m4/svc_entry.S index cf1485d8..e8f06c49 100644 --- a/arch/arm/cortex-m4/svc_entry.S +++ b/arch/arm/cortex-m4/svc_entry.S @@ -34,7 +34,6 @@ SVC_Entry: MOVEQ r2, #0x01 STMFD r1!, {r2} #endif - //LDR sp, =__stack_tp PUSH {lr} BL Svcall /* R0=IRQ, R1=register save (msp) */ POP {lr} diff --git a/arch/arm/cortex-m4/svc_handle.c b/arch/arm/cortex-m4/svc_handle.c index ae286140..b5b91d31 100644 --- a/arch/arm/cortex-m4/svc_handle.c +++ b/arch/arm/cortex-m4/svc_handle.c @@ -21,7 +21,7 @@ static void SvcDispatch(void) { __asm__ __volatile__ ( - " mov r12, sp\n" /* Calculate (orig_SP - new_SP) */ + " mov r12, sp\n" " sub r12, r12, #36\n" " and r12, r12, #7\n" " add r12, r12, #36\n" @@ -56,14 +56,11 @@ void _svcall(uintptr_t* contex) switch (svc_number) { case 0: //svc handler tid->task_dync_sched_member.svc_return = contex[REG_INT_PC]; - //tid->task_dync_sched_member.exc_return = contex[REG_INT_EXC_RETURN]; tid->task_dync_sched_member.isolation_status = 1; contex[REG_INT_PC] = (uint32_t)SvcDispatch & ~1; - //contex[REG_INT_EXC_RETURN] = EXC_RETURN_PRIVTHR; break; case 1: // svc return contex[REG_INT_PC] = tid->task_dync_sched_member.svc_return; - //contex[REG_INT_EXC_RETURN] = tid->task_dync_sched_member.exc_return; tid->task_dync_sched_member.isolation_status = 0; break; default: @@ -76,7 +73,6 @@ uintptr_t SvcHandle(uintptr_t *sp) { uint32_t service_num = 0; service_num = ((uint32_t) sp[0]); //r0 - //KPrintf("SvcHandle service_num :%d\n ",service_num); uint8_t param_num = g_service_table[service_num].param_num; uintptr_t *param = sp + 1; return g_service_table[service_num].fun(service_num,param,param_num) ; @@ -86,7 +82,6 @@ uintptr_t SvcHandle(uintptr_t *sp) uint32_t GetTaskPrivilege(void){ uint32_t unprivileg = 0; struct TaskDescriptor *task = GetKTaskDescriptor(); - //KPrintf("GetTaskPrivilege : %s\n", task->task_base_info.name); if (task->task_dync_sched_member.isolation_flag == 1 && task->task_dync_sched_member.isolation_status == 0) { unprivileg = 1; } else { diff --git a/arch/arm/cortex-m4/svc_handle.h b/arch/arm/cortex-m4/svc_handle.h index df573678..18224170 100644 --- a/arch/arm/cortex-m4/svc_handle.h +++ b/arch/arm/cortex-m4/svc_handle.h @@ -42,7 +42,6 @@ #define REG_INT_R9 (7) /* R9 */ #define REG_INT_R10 (8) /* R10 */ #define REG_INT_R11 (9) /* R11 */ -//#define REG_INT_EXC_RETURN (10) /* EXC_RETURN */ #else #define REG_INT_PRIMASK (0) /* PRIMASK */ #define REG_INT_R4 (1) /* R4 */ @@ -53,17 +52,7 @@ #define REG_INT_R9 (6) /* R9 */ #define REG_INT_R10 (7) /* R10 */ #define REG_INT_R11 (8) /* R11 */ -//#define REG_INT_EXC_RETURN (9) /* EXC_RETURN */ #endif -#define EXC_RETURN_BASE 0xffffffe1 - - -#define EXC_RETURN_PROCESS_STACK (1 << 2) -#define EXC_RETURN_THREAD_MODE (1 << 3) -#define EXC_RETURN_STD_CONTEXT (1 << 4) - -#define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | EXC_RETURN_THREAD_MODE |EXC_RETURN_PROCESS_STACK) -#define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | EXC_RETURN_THREAD_MODE |EXC_RETURN_PROCESS_STACK) #endif diff --git a/arch/arm/shared/prepare_ahwstack.c b/arch/arm/shared/prepare_ahwstack.c index b12d5b01..ac690847 100644 --- a/arch/arm/shared/prepare_ahwstack.c +++ b/arch/arm/shared/prepare_ahwstack.c @@ -150,14 +150,11 @@ uint8 KTaskStackSetup(struct TaskDescriptor *task) StackContex->primask = 0x00000000L; #ifdef SEPARATE_COMPILE if(task->task_dync_sched_member.isolation_flag == 1 ) { - //StackContex->exc_ret = EXC_RETURN_UNPRIVTHR; StackContex->ExErrorStackContex.lr = (unsigned long)USERSPACE->us_taskquit; } else { - //StackContex->exc_ret = EXC_RETURN_PRIVTHR; StackContex->ExErrorStackContex.lr = (unsigned long)KTaskQuit; } #else - //StackContex->exc_ret = EXC_RETURN_PRIVTHR; StackContex->ExErrorStackContex.lr = (unsigned long)KTaskQuit; #endif diff --git a/arch/kswitch.h b/arch/kswitch.h index 2b18e042..f4d118b9 100644 --- a/arch/kswitch.h +++ b/arch/kswitch.h @@ -1,3 +1,14 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ #ifndef __KSWITCH_H__ #define __KSWITCH_H__ diff --git a/kernel/include/xs_ktask.h b/kernel/include/xs_ktask.h index 8100a650..7e2812fa 100644 --- a/kernel/include/xs_ktask.h +++ b/kernel/include/xs_ktask.h @@ -76,7 +76,6 @@ struct TaskDyncSchedMember { uint8 isolation_status; #if defined(ARCH_ARM) uint32_t svc_return; - uint32_t exc_return; #endif #endif From 9f3113da5832df7add1b2f98569284a5d8fbf8bd Mon Sep 17 00:00:00 2001 From: Huang_Yuqing Date: Fri, 30 Apr 2021 16:38:28 +0800 Subject: [PATCH 2/2] add file license description --- arch/risc-v/fe310/boot.S | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/risc-v/fe310/boot.S b/arch/risc-v/fe310/boot.S index 6a2c2efe..0caad9f8 100644 --- a/arch/risc-v/fe310/boot.S +++ b/arch/risc-v/fe310/boot.S @@ -17,9 +17,10 @@ History: 1. Date: 2021-04-25 Author: AIIT XUOS Lab Modification: -1. Modify entry function name -2. Modify OS startup function -3. Add interrupt entry function. +1. See LICENSE details in xiuos/arch/risc-v/fe310/LICENSE +2. Modify entry function name +3. Modify OS startup function +4. Add interrupt entry function. *************************************************/ #include