circt/test
Hideto Ueno d81f0623d5
[HW] Add a folder for array slice op (#4052)
This PR adds a folder for array slice op to fold slice op which extracts entire inputs.
2022-10-04 20:09:17 +09:00
..
Analysis [HW] Add top module inference to InstanceGraph (#3592) 2022-07-26 09:11:28 +02:00
CAPI [CMake] Reduce number of deps (#3569) 2022-07-20 17:37:24 -07:00
Conversion [HandshakeToHW] Fix merge, control merge, buffer (#4053) 2022-10-04 12:54:02 +02:00
Dialect [HW] Add a folder for array slice op (#4052) 2022-10-04 20:09:17 +09:00
Scheduling cpsat scheduler for sharedops (#3350) 2022-09-18 19:38:36 -05:00
Target/ExportSystemC [ExportSystemC] Add systemc type emission (#3875) 2022-09-14 16:58:41 +02:00
Transforms [Transform] [FIRTOOL] Add an pass to strip file locators with "fir" suffix (#3122) 2022-07-06 21:12:32 +09:00
Unit [Moore] Add SystemVerilog types (#2699) 2022-03-04 08:48:45 +01:00
circt-as-dis test: Touchup commandline tests, drop bad regex. 2022-09-23 11:47:32 -05:00
circt-opt [SystemC] Add NewOp and DeleteOp (#3798) 2022-09-01 11:57:52 +02:00
circt-reduce [circt-reduce] Invert test exit code requirement (#3591) 2022-07-25 14:14:37 +02:00
circt-translate [LLHD] remove the LLHD-specific Verilog printer. 2021-12-08 14:01:45 -08:00
firtool Revert "[NFC] Make prepareforemission an embedded pass...", breaks -verbose-pass-executions (#4034) 2022-09-30 10:26:04 -05:00
hlstool test: Touchup commandline tests, drop bad regex. 2022-09-23 11:47:32 -05:00
lib [NFC] Added newlines to the end of files 2022-03-28 18:58:23 +03:00
llhd-sim circt-reduce,firtool,llhd-sim: cleanup --help output, put options in category (#2979) 2022-05-03 16:02:57 -05:00
CMakeLists.txt circt-{as,dis}: init basic MLIR <--> MLIRBC utilities. (#3941) 2022-09-22 10:43:31 -05:00
lit.cfg.py circt-{as,dis}: init basic MLIR <--> MLIRBC utilities. (#3941) 2022-09-22 10:43:31 -05:00
lit.site.cfg.py.in [Scheduling] Set up infrastructure for using OR-Tools' solvers. (#2465) 2022-01-18 10:55:15 +01:00