circt/test
cepheus c0a77be1f4
[MooreToCore] Support to lower unpackedStructType (#7565)
This is a simple way to map unpackedStructType (Moore type) to structType in hw dialect directly.
2024-09-04 11:16:16 +08:00
..
Analysis [Debug] Add scope op (#6454) 2023-12-08 09:38:46 -08:00
CAPI [ARC][CAPI] Add basic C API for initializing ARC (#6997) 2024-05-09 15:48:12 -07:00
Conversion [MooreToCore] Support to lower unpackedStructType (#7565) 2024-09-04 11:16:16 +08:00
Dialect [ESI] Manifest: change the schema to be more rational (#7561) 2024-09-03 13:35:37 -07:00
Scheduling FileCheck directive fixup, now filecheck_lint-clean. (#7057) 2024-05-16 16:25:52 -05:00
Target Bump LLVM to 10407be542aeb2b59477b167bbba3716538dc722. (#7550) 2024-09-01 09:15:42 +01:00
Tools [Seq] Add initial value to compreg (#7553) 2024-08-30 14:08:34 +09:00
Transforms [StringDebugInfoPred] Workaround FusedLoc bytecode issue (#7375) 2024-07-23 12:40:26 +09:00
Unit [Moore] Add SystemVerilog types (#2699) 2022-03-04 08:48:45 +01:00
arcilator [Arc] Hoist reset value in CompReg when lowering for simulation (#6972) 2024-05-02 11:13:56 +02:00
circt-as-dis [NFC, FIRRTL] Rename StrictConnect to MatchingConnect. (#7116) 2024-06-04 09:19:00 -05:00
circt-opt [SMT] Add Dialect rationale and boilerplate 2024-03-12 08:12:50 +01:00
circt-reduce [HW] Change printer for modules (#6205) 2023-09-28 16:30:15 -05:00
circt-translate [FIRRTL] Bump minimum to 2.0.0, remove partial conect (#5075) 2024-06-11 11:07:18 -05:00
circt-verilog [ImportVerilog] Fix single unit preprocessor option (#6682) 2024-02-09 09:15:43 -08:00
firtool fixup! [FIRRTL] Use new layer ABI 2024-08-29 17:13:42 -04:00
hlstool Don't read lowering options from hidden global options (#4038) 2022-10-04 15:41:03 -05:00
ibistool [Ibis] Divorce symbol and actual names in class and container ops (#7123) 2024-06-10 10:06:16 +02:00
lib [NFC] Added newlines to the end of files 2022-03-28 18:58:23 +03:00
om-linker [OM] Register Verif dialect in om-linker. 2024-06-07 11:10:58 -07:00
CMakeLists.txt [circt-lec] Accept two MLIR inputs (#7450) 2024-08-08 00:21:51 +09:00
lit.cfg.py [circt-lec] Accept two MLIR inputs (#7450) 2024-08-08 00:21:51 +09:00
lit.site.cfg.py.in [LLHD] Remove llhd-sim (#7351) 2024-07-19 17:54:14 +01:00